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Documentation: teaching: lectures: update virtualization lecture
Signed-off-by: Octavian Purdila <tavi@cs.pub.ro>
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‎Documentation/teaching/lectures/virt.rst

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@@ -11,7 +11,7 @@ Virtualization
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Lecture objectives:
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===================
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.. slide:: Network Management
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.. slide:: Virtualization
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:inline-contents: True
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:level: 2
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* "Fake" VM physical addresses are translated by the host to actual
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physical addresses
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* Guest virtual address -> Guest physical address -> Host Physical Address
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* The guest page tables are not directly used by the host hardware
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* VM page tables are verified then translated into a new set of page
@@ -192,13 +194,17 @@ Lazy shadow sync
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* To avoid repeated traps, checks and transformations map guest
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page table entries with write access
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* Update the shadow page table when the TLB is flushed
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* Update the shadow page table when
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* The TLB is flushed
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I/O virtualization
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==================
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* In the host page fault handler
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.. slide:: I/O virtualization
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I/O emulation
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=============
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.. slide:: I/O emulation
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:inline-contents: True
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:level: 2
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+-----------------+
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.. slide:: Example: qemu SiFive UART emulation
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:inline-contents: True
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:level: 2
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.. literalinclude:: ../res/sifive_uart.c
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:language: c
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Paravirtualization
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==================
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* VMCS can not be accessed directly but certain information can be
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accessed with special instructions
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VM entry & exit
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---------------
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.. slide:: VM entry & exit
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:inline-contents: True
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:level: 2
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* VM entry - new instructions that switches the CPU in non-root
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mode and loads the VM state from a VMCS; host state is saved in
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VMCS
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* Allows injecting interrupts and exceptions in the guest
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* VM exit will be automatically triggered based on the VMCS
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configuration
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* When VM exit occurs host state is loaded from VMCS, guest state
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is saved in VMCS
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VM execution control fields
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---------------------------
@@ -325,25 +357,6 @@ VM execution control fields
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generate a VM exit
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VM entry & exit
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---------------
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.. slide:: VM entry & exit
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:inline-contents: True
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:level: 2
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* VM entry - new instructions that switches the CPU in non-root
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mode and loads the VM state from a VMCS; host state is saved in
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VMCS
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* Allows injecting interrupts and exceptions in the guest
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* VM exit will be automatically triggered based on the VMCS
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configuration
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* When VM exit occurs host state is loaded from VMCS, guest state
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is saved in VMCS
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Extend Page Tables
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==================
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@@ -394,33 +407,158 @@ VPID
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* When searching the TLB just the current VPID is used
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Intel VT-d
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==========
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I/O virtualization
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==================
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* Direct access to hardware from a VM - in a controlled fashion
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* Map the MMIO host directly to the guest
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.. slide:: Intel VT-d
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* Forward interrupts
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.. slide:: I/O virtualization
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:inline-contents: True
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:level: 2
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.. ditaa::
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+---------------------+ +---------------------+
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| Guest OS | | Guest OS |
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| +---------------+ | | +---------------+ |
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| | Guest Driver | | | | Guest Driver | |
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| +---------------+ | | +---------------+ |
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| | ^ | | | ^ |
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| | | | | | | |
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+----+-----------+----+ +----+-----------+----+
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| traped | | mapped |
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| access | | access |
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+---+-----------+----+ +---+-----------+-----+ But how do we deal with DMA?
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| | VMM | | | | VMM | |
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| v | | | | | |
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| +----------------+ | | | +---------+ |
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| | Virtual Device | | | | | IRQ | |
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| +----------------+ | | | | Mapping | |
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| | ^ | | | +---------+ |
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| | | | | | | |
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+--+------------+----+ +---+-----------+-----+
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| | | |
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v | v |
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+-----------------+ +-----------------+
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| Physical Device | | Physical Device |
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+-----------------+ +-----------------+
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Instead of trapping MMIO as with emulated devices we can allow the
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guest to access the MMIO directly by mapping through its page tables.
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Interrupts from the device are handled by the host kernel and a signal
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is send to the VMM which injects the interrupt to the guest just as
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for the emulated devices.
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.. slide:: I/O MMU
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:inline-contents: True
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:level: 2
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VT-d protects and translates VM physical addresses using an I/O
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MMU (DMA remaping)
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.. ditaa::
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+------+ +------+
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| | | |
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| CPU | | DMA |
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| | | |
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+------+ +------+
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|
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|
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v
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+-----+ +-----+
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| CR3 | | EPT |
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+-----+ +-----+
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| +------------------+ | +----------------+
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| | | | | |
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+--------> | Guest Page Table | +-------> | EPT Page Table | --------------->
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| | | |
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------------> +------------------+ ------------> +----------------+
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Guest Virtual Guest Physical Host Physical
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Address Address Address
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.. slide:: Interrupt posting
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:inline-contents: True
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:level: 2
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* Direct access to hardware from a VM - in a controlled was
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* Messsage Signaled Interrupts (MSI) = DMA writes to the host
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address range of the IRQ controller (e.g. 0xFEExxxxx)
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* The physical device must support multiplexing (e.g. SR-IOV)
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* Low bits of the address and the data indicate which interrupt
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vector to deliver to which CPU
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* I/O assignments
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* Interrupt remapping table points to the virtual CPU (VMCS) that
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should receive the interrupt
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* IRQ routing
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* I/O MMU will trap the IRQ controller write and look it up in the
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interrupt remmaping table
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* VT-d protects and translates VM physical addresses using an I/O
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MMU (DMA remaping)
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* if that virtual CPU is currently running it will take the
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interrupt directly
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* otherwise a bit is set in a table (Posted Interrupt Descriptor
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table) and the interrupt will be inject next time that vCPU is
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run
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DMA remapping
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-------------
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.. slide:: DMA remapping
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.. slide:: I/O virtualization
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:inline-contents: True
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:level: 2
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.. image:: ../res/dma-remapping.png
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.. ditaa::
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+---------------------+ +---------------------+ +---------------------+
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| Guest OS | | Guest OS | | Guest OS |
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| +---------------+ | | +---------------+ | | +---------------+ |
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| | Guest Driver | | | | Guest Driver | | | | Guest Driver | |
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| +---------------+ | | +---------------+ | | +---------------+ |
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| | ^ | | | ^ | | | ^ |
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| | | | | | | | | | | |
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+----+-----------+----+ +----+-----------+----+ +----+-----------+----+
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| traped | | mapped | | mapped | interrupt
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| access | | access | | access | posting
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+---+-----------+----+ +---+-----------+-----+ +---+-----------+-----+
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| | VMM | | | | VMM | | | | VMM | |
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| v | | | | | | | | | |
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| +----------------+ | | | +---------+ | | | | |
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| | Virtual Device | | | | | IRQ | | | | | |
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| +----------------+ | | | | Mapping | | | | | |
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| | ^ | | | +---------+ | | | | |
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| | | | | | | | | | | |
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+--+------------+----+ +---+-----------+-----+ +---+-----------+-----+
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| | | | | |
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v | v | v |
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+-----------------+ +-----------------+ +-----------------+
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| Physical Device | | Physical Device | | Physical Device |
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+-----------------+ +-----------------+ +-----------------+
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.. slide:: SR-IOV
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:inline-contents: True
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:level: 2
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* Single Root - Input Output Virtualization
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* Physical device with multiple Ethernet ports will be shown as
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multiple device on the PCI bus
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* Physical Function is used for the control and can be configured
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* to present itself as a new PCI device
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* which VLAN to use
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* The new virtual function is enumerated on the bus and can be
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assigned to a particular guest
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qemu
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:inline-contents: True
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:level: 2
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* VMM implemented inside the Linux kernel
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* Requires hardware virtualization (e.g. Intel VT-x)
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* Shadow page tables or EPT if present
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* Uses qemu or virtio for I/O virtualization
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.. ditaa::
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VM1 (qemu) VM2 (qemu)
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+----------------------------------------------------+
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.. slide:: KVM
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:inline-contents: True
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:level: 2
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* Linux device driver for hardware virtualization (e.g. Intel VT-x, SVM)
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* IOCTL based interface for managing and running virtual CPUs
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* VMM components implemented inside the Linux kernel
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(e.g. interrupt controller, timers)
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* Shadow page tables or EPT if present
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* Uses qemu or virtio for I/O virtualization
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Type 1 vs Type 2 Hypervisors
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============================
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.. slide:: Xen
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:inline-contents: True
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:level: 2
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* Type 1 = Bare Metal Hypervisor
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* Type 2 = Hypervisor embedded in an exist kernel / OS
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Xen
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===
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