diff --git a/gcc14/0001-LoongArch-Fix-incorrect-reorder-of-__lsx_vldx-and-__.patch b/gcc14/0001-LoongArch-Fix-incorrect-reorder-of-__lsx_vldx-and-__.patch deleted file mode 100644 index d31180e8..00000000 --- a/gcc14/0001-LoongArch-Fix-incorrect-reorder-of-__lsx_vldx-and-__.patch +++ /dev/null @@ -1,158 +0,0 @@ -From 6e4ca8b9c4944ffe896f4d8952f29c4cd518df22 Mon Sep 17 00:00:00 2001 -From: Xi Ruoyao -Date: Sun, 2 Mar 2025 19:02:50 +0800 -Subject: [gcc14 PATCH] LoongArch: Fix incorrect reorder of __lsx_vldx and - __lasx_xvldx [PR119084] - -They could be incorrectly reordered with store instructions like st.b -because the RTL expression does not have a memory_operand or a (mem) -expression. The incorrect reorder has been observed in openh264 LTO -build. - -Expand them to a (mem) expression instead of unspec to fix the issue. - -Closes: https://github.com/cisco/openh264/issues/3857 - -(cherry picked from commit 4856292f7a680ec478e7607f1b71781996d7d542) - -Edited to remove the loongarch.cc change which is not needed for gcc-14 -branch. - -gcc/ChangeLog: - - PR target/119084 - * config/loongarch/lasx.md (UNSPEC_LASX_XVLDX): Remove. - (lasx_xvldx): Remove. - * config/loongarch/lsx.md (UNSPEC_LSX_VLDX): Remove. - (lsx_vldx): Remove. - * config/loongarch/simd.md (QIVEC): New define_mode_iterator. - (_vldx): New define_expand. - -gcc/testsuite/ChangeLog: - - PR target/119084 - * gcc.target/loongarch/pr119084.c: New test. ---- - gcc/config/loongarch/lasx.md | 13 ---------- - gcc/config/loongarch/lsx.md | 13 ---------- - gcc/config/loongarch/simd.md | 10 ++++++++ - gcc/testsuite/gcc.target/loongarch/pr119084.c | 24 +++++++++++++++++++ - 4 files changed, 34 insertions(+), 26 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/loongarch/pr119084.c - -diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md -index 94bbd0c26bb..fe32194e811 100644 ---- a/gcc/config/loongarch/lasx.md -+++ b/gcc/config/loongarch/lasx.md -@@ -155,7 +155,6 @@ (define_c_enum "unspec" [ - UNSPEC_LASX_XVSSRLRN - UNSPEC_LASX_XVEXTL_QU_DU - UNSPEC_LASX_XVLDI -- UNSPEC_LASX_XVLDX - UNSPEC_LASX_XVSTX - UNSPEC_LASX_VECINIT_MERGE - UNSPEC_LASX_VEC_SET_INTERNAL -@@ -4679,18 +4678,6 @@ (define_insn "lasx_xvldi" - [(set_attr "type" "simd_load") - (set_attr "mode" "V4DI")]) - --(define_insn "lasx_xvldx" -- [(set (match_operand:V32QI 0 "register_operand" "=f") -- (unspec:V32QI [(match_operand:DI 1 "register_operand" "r") -- (match_operand:DI 2 "reg_or_0_operand" "rJ")] -- UNSPEC_LASX_XVLDX))] -- "ISA_HAS_LASX" --{ -- return "xvldx\t%u0,%1,%z2"; --} -- [(set_attr "type" "simd_load") -- (set_attr "mode" "V32QI")]) -- - (define_insn "lasx_xvstx" - [(set (mem:V32QI (plus:DI (match_operand:DI 1 "register_operand" "r") - (match_operand:DI 2 "reg_or_0_operand" "rJ"))) -diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md -index 5ee5845e84b..67ba8e8ad5d 100644 ---- a/gcc/config/loongarch/lsx.md -+++ b/gcc/config/loongarch/lsx.md -@@ -100,7 +100,6 @@ (define_c_enum "unspec" [ - UNSPEC_LSX_VSSRLRN - UNSPEC_LSX_VLDI - UNSPEC_LSX_VSHUF_B -- UNSPEC_LSX_VLDX - UNSPEC_LSX_VSTX - UNSPEC_LSX_VEXTL_QU_DU - UNSPEC_LSX_VSETEQZ_V -@@ -3070,18 +3069,6 @@ (define_insn "lsx_vshuf_b" - [(set_attr "type" "simd_shf") - (set_attr "mode" "V16QI")]) - --(define_insn "lsx_vldx" -- [(set (match_operand:V16QI 0 "register_operand" "=f") -- (unspec:V16QI [(match_operand:DI 1 "register_operand" "r") -- (match_operand:DI 2 "reg_or_0_operand" "rJ")] -- UNSPEC_LSX_VLDX))] -- "ISA_HAS_LSX" --{ -- return "vldx\t%w0,%1,%z2"; --} -- [(set_attr "type" "simd_load") -- (set_attr "mode" "V16QI")]) -- - (define_insn "lsx_vstx" - [(set (mem:V16QI (plus:DI (match_operand:DI 1 "register_operand" "r") - (match_operand:DI 2 "reg_or_0_operand" "rJ"))) -diff --git a/gcc/config/loongarch/simd.md b/gcc/config/loongarch/simd.md -index 00ff2823a4e..691e7195636 100644 ---- a/gcc/config/loongarch/simd.md -+++ b/gcc/config/loongarch/simd.md -@@ -113,6 +113,16 @@ (define_mode_attr bitimm [(V16QI "uimm3") (V32QI "uimm3") - ;; instruction here so we can avoid duplicating logics. - ;; ======================================================================= - -+;; REG + REG load -+ -+(define_mode_iterator QIVEC [(V16QI "ISA_HAS_LSX") (V32QI "ISA_HAS_LASX")]) -+(define_expand "_vldx" -+ [(set (match_operand:QIVEC 0 "register_operand" "=f") -+ (mem:QIVEC (plus:DI (match_operand:DI 1 "register_operand") -+ (match_operand:DI 2 "register_operand"))))] -+ "TARGET_64BIT") -+ -+ - ;; - ;; FP vector rounding instructions - ;; -diff --git a/gcc/testsuite/gcc.target/loongarch/pr119084.c b/gcc/testsuite/gcc.target/loongarch/pr119084.c -new file mode 100644 -index 00000000000..b5943303851 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/loongarch/pr119084.c -@@ -0,0 +1,24 @@ -+/* { dg-do run } */ -+/* { dg-options "-O2 -mlsx" } */ -+/* { dg-require-effective-target loongarch_sx_hw } */ -+ -+typedef signed char V16QI __attribute__ ((vector_size (16))); -+static char x[128]; -+ -+__attribute__ ((noipa)) int -+noopt (int x) -+{ -+ return x; -+} -+ -+int -+main (void) -+{ -+ int t = noopt (32); -+ -+ x[32] = 1; -+ -+ V16QI y = __builtin_lsx_vldx (x, t); -+ if (y[0] != 1) -+ __builtin_trap (); -+} --- -2.48.1 - diff --git a/gcc14/LoongArch-Support-Q-suffix-for-__float128.patch b/gcc14/LoongArch-Support-Q-suffix-for-__float128.patch deleted file mode 100644 index d4876d9e..00000000 --- a/gcc14/LoongArch-Support-Q-suffix-for-__float128.patch +++ /dev/null @@ -1,71 +0,0 @@ -In r14-3635 supports `__float128`, but does not support the 'q/Q' suffix. - - PR target/119408 - -gcc/ChangeLog: - - * config/loongarch/loongarch.cc - (loongarch_c_mode_for_suffix): New. - (TARGET_C_MODE_FOR_SUFFIX): Define. - -gcc/testsuite/ChangeLog: - - * gcc.target/loongarch/pr119408.c: New test. - ---- - gcc/config/loongarch/loongarch.cc | 13 +++++++++++++ - gcc/testsuite/gcc.target/loongarch/pr119408.c | 12 ++++++++++++ - 2 files changed, 25 insertions(+) - create mode 100644 gcc/testsuite/gcc.target/loongarch/pr119408.c - -diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc -index 01f048664b5..7533e53839f 100644 ---- a/gcc/config/loongarch/loongarch.cc -+++ b/gcc/config/loongarch/loongarch.cc -@@ -11206,6 +11206,16 @@ loongarch_asm_code_end (void) - #undef DUMP_FEATURE - } - -+/* Target hook for c_mode_for_suffix. */ -+static machine_mode -+loongarch_c_mode_for_suffix (char suffix) -+{ -+ if (suffix == 'q') -+ return TFmode; -+ -+ return VOIDmode; -+} -+ - /* Initialize the GCC target structure. */ - #undef TARGET_ASM_ALIGNED_HI_OP - #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t" -@@ -11477,6 +11487,9 @@ loongarch_asm_code_end (void) - #undef TARGET_OPTION_VALID_ATTRIBUTE_P - #define TARGET_OPTION_VALID_ATTRIBUTE_P loongarch_option_valid_attribute_p - -+#undef TARGET_C_MODE_FOR_SUFFIX -+#define TARGET_C_MODE_FOR_SUFFIX loongarch_c_mode_for_suffix -+ - struct gcc_target targetm = TARGET_INITIALIZER; - - #include "gt-loongarch.h" -diff --git a/gcc/testsuite/gcc.target/loongarch/pr119408.c b/gcc/testsuite/gcc.target/loongarch/pr119408.c -new file mode 100644 -index 00000000000..f46399aa0b5 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/loongarch/pr119408.c -@@ -0,0 +1,12 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -Wno-pedantic" } */ -+ -+__float128 a; -+__float128 b; -+void -+test (void) -+{ -+ a = 1.11111111Q; -+ b = 1.434345q; -+} -+ --- -2.34.1 diff --git a/gcc14/loong.patch b/gcc14/loong.patch index 8afde579..44efbdc3 100644 --- a/gcc14/loong.patch +++ b/gcc14/loong.patch @@ -1,21 +1,18 @@ +diff --git a/PKGBUILD b/PKGBUILD +index 51f66f9..19ba6c9 100644 --- a/PKGBUILD +++ b/PKGBUILD -@@ -61,6 +61,14 @@ prepare() { +@@ -61,6 +61,9 @@ prepare() { sed -i '/m64=/s/lib64/lib/' gcc/config/i386/t-linux64 mkdir -p "$srcdir/gcc-build" + # Patches for loong64 + # Fix libdir + patch -Np1 -i "$srcdir/gcc-lib64-lib.patch" -+ # Back port fix for __builtin_lsx_vldx -+ patch -Np1 -i "$srcdir/0001-LoongArch-Fix-incorrect-reorder-of-__lsx_vldx-and-__.patch" -+ # Back port Q suffix for __float128 -+ patch -Np1 -i "$srcdir/LoongArch-Support-Q-suffix-for-__float128.patch" -+ } build() { -@@ -87,6 +95,7 @@ build() { +@@ -87,6 +90,7 @@ build() { --enable-linker-build-id --enable-lto --disable-multilib @@ -23,7 +20,7 @@ --enable-plugin --enable-shared --enable-threads=posix -@@ -136,8 +145,8 @@ package_gcc14-libs() { +@@ -136,8 +140,8 @@ package_gcc14-libs() { cd gcc-build make -C $CHOST/libgcc DESTDIR="$pkgdir" install-shared @@ -34,7 +31,7 @@ rm -f "$pkgdir/$_libdir/libgcc_eh.a" for lib in libasan.so \ -@@ -179,8 +188,8 @@ package_gcc14() { +@@ -179,8 +183,8 @@ package_gcc14() { install -m755 -t "$pkgdir/${_libdir}/" gcc/{cc1,cc1plus,collect2,lto1,gcov{,-tool}} make -C $CHOST/libgcc DESTDIR="$pkgdir" install @@ -45,16 +42,10 @@ make -C $CHOST/libstdc++-v3/src DESTDIR="$pkgdir" install make -C $CHOST/libstdc++-v3/include DESTDIR="$pkgdir" install -@@ -251,3 +260,12 @@ package_gcc14-fortran() { +@@ -251,3 +255,6 @@ package_gcc14-fortran() { ln -s /usr/share/licenses/gcc-libs/RUNTIME.LIBRARY.EXCEPTION \ "$pkgdir/usr/share/licenses/$pkgname/" } + -+source+=("gcc-lib64-lib.patch" -+ # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119084 -+ # Fix https://github.com/cisco/openh264/issues/3857 -+ "0001-LoongArch-Fix-incorrect-reorder-of-__lsx_vldx-and-__.patch" -+ "LoongArch-Support-Q-suffix-for-__float128.patch") -+sha256sums+=('d09cbb949364442a78e886b8f55593f07ad17f1e5369ecc83d6c6826015ba22e' -+ '8a4fec2937e22fda73ce549b3f11a70c2bcc343c2dfca2de29217b2708148552' -+ 'fabf067e4e5a17480dde6e05af3bdfc5e38e46837538e172d9251b50ec9cc015') ++source+=("gcc-lib64-lib.patch") ++sha256sums+=('d09cbb949364442a78e886b8f55593f07ad17f1e5369ecc83d6c6826015ba22e')