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[CodeGen] Add Pre-commit tests for D146988
Differential Revision: https://reviews.llvm.org/D147659
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‎llvm/test/CodeGen/AArch64/complex-deinterleaving-multiuses.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s --mattr=+complxnum,+neon -o - | FileCheck %s
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target triple = "aarch64-arm-none-eabi"
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; Expected to not transform
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; *p = (a * b);
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; return (a * b) * a;
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define <4 x float> @mul_triangle(<4 x float> %a, <4 x float> %b, ptr %p) {
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; CHECK-LABEL: mul_triangle:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ext v2.16b, v0.16b, v0.16b, #8
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; CHECK-NEXT: ext v3.16b, v1.16b, v1.16b, #8
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; CHECK-NEXT: zip2 v4.2s, v0.2s, v2.2s
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; CHECK-NEXT: zip1 v0.2s, v0.2s, v2.2s
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; CHECK-NEXT: zip2 v5.2s, v1.2s, v3.2s
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; CHECK-NEXT: zip1 v1.2s, v1.2s, v3.2s
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; CHECK-NEXT: fmul v6.2s, v5.2s, v4.2s
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; CHECK-NEXT: fneg v2.2s, v6.2s
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; CHECK-NEXT: fmla v2.2s, v0.2s, v1.2s
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; CHECK-NEXT: fmul v3.2s, v4.2s, v1.2s
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; CHECK-NEXT: fmla v3.2s, v0.2s, v5.2s
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; CHECK-NEXT: fmul v1.2s, v3.2s, v4.2s
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; CHECK-NEXT: fmul v5.2s, v3.2s, v0.2s
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; CHECK-NEXT: st2 { v2.2s, v3.2s }, [x0]
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; CHECK-NEXT: fneg v1.2s, v1.2s
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; CHECK-NEXT: fmla v5.2s, v4.2s, v2.2s
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; CHECK-NEXT: fmla v1.2s, v0.2s, v2.2s
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; CHECK-NEXT: zip1 v0.4s, v1.4s, v5.4s
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; CHECK-NEXT: ret
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entry:
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%strided.vec = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec35 = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%strided.vec37 = shufflevector <4 x float> %b, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec38 = shufflevector <4 x float> %b, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%0 = fmul fast <2 x float> %strided.vec37, %strided.vec
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%1 = fmul fast <2 x float> %strided.vec38, %strided.vec35
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%2 = fsub fast <2 x float> %0, %1
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%3 = fmul fast <2 x float> %2, %strided.vec35
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%4 = fmul fast <2 x float> %strided.vec38, %strided.vec
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%5 = fmul fast <2 x float> %strided.vec35, %strided.vec37
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%6 = fadd fast <2 x float> %4, %5
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%otheruse = shufflevector <2 x float> %2, <2 x float> %6, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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store <4 x float> %otheruse, ptr %p
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%7 = fmul fast <2 x float> %6, %strided.vec
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%8 = fadd fast <2 x float> %3, %7
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%9 = fmul fast <2 x float> %2, %strided.vec
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%10 = fmul fast <2 x float> %6, %strided.vec35
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%11 = fsub fast <2 x float> %9, %10
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%interleaved.vec = shufflevector <2 x float> %11, <2 x float> %8, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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ret <4 x float> %interleaved.vec
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}
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; Expected to not transform. Shows that external use prevents deinterleaving.
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; *p = (a * b).real();
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; return (a * b) * a;
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define <4 x float> @mul_triangle_external_use(<4 x float> %a, <4 x float> %b, ptr %p) {
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; CHECK-LABEL: mul_triangle_external_use:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ext v2.16b, v0.16b, v0.16b, #8
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; CHECK-NEXT: ext v3.16b, v1.16b, v1.16b, #8
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; CHECK-NEXT: zip2 v4.2s, v0.2s, v2.2s
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; CHECK-NEXT: zip1 v0.2s, v0.2s, v2.2s
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; CHECK-NEXT: zip1 v5.2s, v1.2s, v3.2s
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; CHECK-NEXT: zip2 v1.2s, v1.2s, v3.2s
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; CHECK-NEXT: fmul v2.2s, v4.2s, v5.2s
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; CHECK-NEXT: fmul v3.2s, v1.2s, v4.2s
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; CHECK-NEXT: fmla v2.2s, v0.2s, v1.2s
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; CHECK-NEXT: fneg v1.2s, v3.2s
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; CHECK-NEXT: fmul v3.2s, v2.2s, v4.2s
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; CHECK-NEXT: fmla v1.2s, v0.2s, v5.2s
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; CHECK-NEXT: fmul v5.2s, v2.2s, v0.2s
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; CHECK-NEXT: str d2, [x0]
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; CHECK-NEXT: fneg v3.2s, v3.2s
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; CHECK-NEXT: fmla v5.2s, v4.2s, v1.2s
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; CHECK-NEXT: fmla v3.2s, v0.2s, v1.2s
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; CHECK-NEXT: zip1 v0.4s, v3.4s, v5.4s
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; CHECK-NEXT: ret
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entry:
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%strided.vec = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec35 = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%strided.vec37 = shufflevector <4 x float> %b, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec38 = shufflevector <4 x float> %b, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%0 = fmul fast <2 x float> %strided.vec37, %strided.vec
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%1 = fmul fast <2 x float> %strided.vec38, %strided.vec35
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%2 = fsub fast <2 x float> %0, %1
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%3 = fmul fast <2 x float> %2, %strided.vec35
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%4 = fmul fast <2 x float> %strided.vec38, %strided.vec
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%5 = fmul fast <2 x float> %strided.vec35, %strided.vec37
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%6 = fadd fast <2 x float> %4, %5
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store <2 x float> %6, ptr %p
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%7 = fmul fast <2 x float> %6, %strided.vec
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%8 = fadd fast <2 x float> %3, %7
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%9 = fmul fast <2 x float> %2, %strided.vec
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%10 = fmul fast <2 x float> %6, %strided.vec35
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%11 = fsub fast <2 x float> %9, %10
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%interleaved.vec = shufflevector <2 x float> %11, <2 x float> %8, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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ret <4 x float> %interleaved.vec
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}
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; Expected to transform partially (only d * c). Shows that external use of shufflevector does not prevent deinterleaving.
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; *p1 = (a * b).real();
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; *p2 = (a * b) * c;
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; return d * c;
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define <4 x float> @multiple_muls_shuffle_external(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, ptr %p1, ptr %p2) {
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; CHECK-LABEL: multiple_muls_shuffle_external:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ext v5.16b, v0.16b, v0.16b, #8
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; CHECK-NEXT: ext v6.16b, v1.16b, v1.16b, #8
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; CHECK-NEXT: movi v4.2d, #0000000000000000
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; CHECK-NEXT: zip2 v7.2s, v0.2s, v5.2s
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; CHECK-NEXT: zip1 v0.2s, v0.2s, v5.2s
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; CHECK-NEXT: zip1 v16.2s, v1.2s, v6.2s
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; CHECK-NEXT: zip2 v1.2s, v1.2s, v6.2s
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; CHECK-NEXT: ext v6.16b, v2.16b, v2.16b, #8
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; CHECK-NEXT: fcmla v4.4s, v3.4s, v2.4s, #0
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; CHECK-NEXT: fmul v5.2s, v16.2s, v7.2s
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; CHECK-NEXT: fmul v7.2s, v1.2s, v7.2s
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; CHECK-NEXT: fcmla v4.4s, v3.4s, v2.4s, #90
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; CHECK-NEXT: fmla v5.2s, v0.2s, v1.2s
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; CHECK-NEXT: fneg v1.2s, v7.2s
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; CHECK-NEXT: zip1 v7.2s, v2.2s, v6.2s
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; CHECK-NEXT: zip2 v6.2s, v2.2s, v6.2s
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; CHECK-NEXT: fmla v1.2s, v0.2s, v16.2s
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; CHECK-NEXT: fmul v17.2s, v7.2s, v5.2s
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; CHECK-NEXT: fmul v0.2s, v6.2s, v5.2s
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; CHECK-NEXT: str d1, [x0]
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; CHECK-NEXT: fmla v17.2s, v1.2s, v6.2s
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; CHECK-NEXT: fneg v16.2s, v0.2s
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; CHECK-NEXT: mov v0.16b, v4.16b
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; CHECK-NEXT: fmla v16.2s, v1.2s, v7.2s
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; CHECK-NEXT: st2 { v16.2s, v17.2s }, [x1]
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; CHECK-NEXT: ret
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entry:
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%strided.vec = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec88 = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%strided.vec90 = shufflevector <4 x float> %b, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec91 = shufflevector <4 x float> %b, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%0 = fmul fast <2 x float> %strided.vec91, %strided.vec
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%1 = fmul fast <2 x float> %strided.vec90, %strided.vec88
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%2 = fadd fast <2 x float> %0, %1
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%3 = fmul fast <2 x float> %strided.vec90, %strided.vec
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%4 = fmul fast <2 x float> %strided.vec91, %strided.vec88
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%5 = fsub fast <2 x float> %3, %4
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store <2 x float> %5, ptr %p1
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%strided.vec93 = shufflevector <4 x float> %c, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec94 = shufflevector <4 x float> %c, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%6 = fmul fast <2 x float> %strided.vec94, %5
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%7 = fmul fast <2 x float> %strided.vec93, %2
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%8 = fadd fast <2 x float> %6, %7
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%9 = fmul fast <2 x float> %strided.vec93, %5
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%10 = fmul fast <2 x float> %strided.vec94, %2
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%11 = fsub fast <2 x float> %9, %10
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%interleaved.vec = shufflevector <2 x float> %11, <2 x float> %8, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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store <4 x float> %interleaved.vec, ptr %p2
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%strided.vec96 = shufflevector <4 x float> %d, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec97 = shufflevector <4 x float> %d, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%12 = fmul fast <2 x float> %strided.vec96, %strided.vec94
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%13 = fmul fast <2 x float> %strided.vec97, %strided.vec93
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%14 = fadd fast <2 x float> %13, %12
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%15 = fmul fast <2 x float> %strided.vec96, %strided.vec93
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%16 = fmul fast <2 x float> %strided.vec97, %strided.vec94
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%17 = fsub fast <2 x float> %15, %16
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%interleaved.vec98 = shufflevector <2 x float> %17, <2 x float> %14, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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ret <4 x float> %interleaved.vec98
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}
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; Same as above but data are loaded from memory instead of being passes as arguments.
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; Expected to transform partially (only d * c).
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; Shows that ld2 is not generated for `c` although it used by both complex `d * c` and non-complex `(a * b) * c` instruction chains.
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define <4 x float> @multiple_muls_shuffle_external_with_loads(ptr %ptr_a, ptr %ptr_b, ptr %ptr_c, ptr %ptr_d, ptr %p1, ptr %p2) {
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; CHECK-LABEL: multiple_muls_shuffle_external_with_loads:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ld2 { v1.2s, v2.2s }, [x0]
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: ld2 { v3.2s, v4.2s }, [x1]
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; CHECK-NEXT: fmul v5.2s, v4.2s, v2.2s
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; CHECK-NEXT: fmul v7.2s, v3.2s, v2.2s
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; CHECK-NEXT: fneg v5.2s, v5.2s
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; CHECK-NEXT: fmla v7.2s, v1.2s, v4.2s
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; CHECK-NEXT: fmla v5.2s, v1.2s, v3.2s
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; CHECK-NEXT: str d5, [x4]
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; CHECK-NEXT: ldr q6, [x2]
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; CHECK-NEXT: ext v16.16b, v6.16b, v6.16b, #8
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; CHECK-NEXT: zip1 v1.2s, v6.2s, v16.2s
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; CHECK-NEXT: zip2 v2.2s, v6.2s, v16.2s
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; CHECK-NEXT: fmul v4.2s, v1.2s, v7.2s
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; CHECK-NEXT: fmul v7.2s, v2.2s, v7.2s
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; CHECK-NEXT: fmla v4.2s, v5.2s, v2.2s
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; CHECK-NEXT: fneg v3.2s, v7.2s
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; CHECK-NEXT: fmla v3.2s, v5.2s, v1.2s
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; CHECK-NEXT: st2 { v3.2s, v4.2s }, [x5]
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; CHECK-NEXT: ldr q1, [x3]
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; CHECK-NEXT: fcmla v0.4s, v1.4s, v6.4s, #0
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; CHECK-NEXT: fcmla v0.4s, v1.4s, v6.4s, #90
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; CHECK-NEXT: ret
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entry:
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%a = load <4 x float>, ptr %ptr_a
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%strided.vec = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec88 = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%b = load <4 x float>, ptr %ptr_b
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%strided.vec90 = shufflevector <4 x float> %b, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec91 = shufflevector <4 x float> %b, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%0 = fmul fast <2 x float> %strided.vec91, %strided.vec
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%1 = fmul fast <2 x float> %strided.vec90, %strided.vec88
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%2 = fadd fast <2 x float> %0, %1
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%3 = fmul fast <2 x float> %strided.vec90, %strided.vec
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%4 = fmul fast <2 x float> %strided.vec91, %strided.vec88
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%5 = fsub fast <2 x float> %3, %4
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store <2 x float> %5, ptr %p1
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%c = load <4 x float>, ptr %ptr_c
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%strided.vec93 = shufflevector <4 x float> %c, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec94 = shufflevector <4 x float> %c, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%6 = fmul fast <2 x float> %strided.vec94, %5
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%7 = fmul fast <2 x float> %strided.vec93, %2
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%8 = fadd fast <2 x float> %6, %7
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%9 = fmul fast <2 x float> %strided.vec93, %5
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%10 = fmul fast <2 x float> %strided.vec94, %2
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%11 = fsub fast <2 x float> %9, %10
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%interleaved.vec = shufflevector <2 x float> %11, <2 x float> %8, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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store <4 x float> %interleaved.vec, ptr %p2
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%d = load <4 x float>, ptr %ptr_d
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%strided.vec96 = shufflevector <4 x float> %d, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec97 = shufflevector <4 x float> %d, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%12 = fmul fast <2 x float> %strided.vec96, %strided.vec94
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%13 = fmul fast <2 x float> %strided.vec97, %strided.vec93
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%14 = fadd fast <2 x float> %13, %12
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%15 = fmul fast <2 x float> %strided.vec96, %strided.vec93
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%16 = fmul fast <2 x float> %strided.vec97, %strided.vec94
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%17 = fsub fast <2 x float> %15, %16
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%interleaved.vec98 = shufflevector <2 x float> %17, <2 x float> %14, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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ret <4 x float> %interleaved.vec98
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}
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; Expected to not transform. Shows that external use prevents deinterleaving whole chain.
235+
; *p1 = (a * b).real();
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; *p2 = (a * b) * (d * c);
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; return d * c;
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define <4 x float> @multiple_muls_mul_external(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, ptr %p1, ptr %p2) {
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; CHECK-LABEL: multiple_muls_mul_external:
240+
; CHECK: // %bb.0: // %entry
241+
; CHECK-NEXT: ext v5.16b, v0.16b, v0.16b, #8
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; CHECK-NEXT: ext v6.16b, v1.16b, v1.16b, #8
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; CHECK-NEXT: ext v4.16b, v3.16b, v3.16b, #8
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; CHECK-NEXT: ext v7.16b, v2.16b, v2.16b, #8
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; CHECK-NEXT: zip2 v16.2s, v0.2s, v5.2s
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; CHECK-NEXT: zip2 v17.2s, v1.2s, v6.2s
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; CHECK-NEXT: zip1 v0.2s, v0.2s, v5.2s
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; CHECK-NEXT: zip1 v1.2s, v1.2s, v6.2s
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; CHECK-NEXT: zip1 v18.2s, v2.2s, v7.2s
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; CHECK-NEXT: zip2 v2.2s, v2.2s, v7.2s
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; CHECK-NEXT: zip2 v7.2s, v3.2s, v4.2s
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; CHECK-NEXT: zip1 v3.2s, v3.2s, v4.2s
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; CHECK-NEXT: fmul v19.2s, v16.2s, v17.2s
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; CHECK-NEXT: fmul v5.2s, v18.2s, v7.2s
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; CHECK-NEXT: fmul v6.2s, v2.2s, v7.2s
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; CHECK-NEXT: fneg v4.2s, v19.2s
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; CHECK-NEXT: fmul v7.2s, v0.2s, v17.2s
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; CHECK-NEXT: fmla v5.2s, v3.2s, v2.2s
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; CHECK-NEXT: fneg v2.2s, v6.2s
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; CHECK-NEXT: fmla v4.2s, v1.2s, v0.2s
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; CHECK-NEXT: fmla v7.2s, v1.2s, v16.2s
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; CHECK-NEXT: fmla v2.2s, v3.2s, v18.2s
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; CHECK-NEXT: fmul v17.2s, v4.2s, v5.2s
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; CHECK-NEXT: fmul v0.2s, v7.2s, v5.2s
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; CHECK-NEXT: str d4, [x0]
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; CHECK-NEXT: fmla v17.2s, v2.2s, v7.2s
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; CHECK-NEXT: fneg v16.2s, v0.2s
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; CHECK-NEXT: zip1 v0.4s, v2.4s, v5.4s
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; CHECK-NEXT: fmla v16.2s, v2.2s, v4.2s
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; CHECK-NEXT: st2 { v16.2s, v17.2s }, [x1]
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; CHECK-NEXT: ret
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entry:
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%strided.vec = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> <i32 0, i32 2>
274+
%strided.vec126 = shufflevector <4 x float> %a, <4 x float> poison, <2 x i32> <i32 1, i32 3>
275+
%strided.vec128 = shufflevector <4 x float> %b, <4 x float> poison, <2 x i32> <i32 0, i32 2>
276+
%strided.vec129 = shufflevector <4 x float> %b, <4 x float> poison, <2 x i32> <i32 1, i32 3>
277+
%0 = fmul nnan ninf contract <2 x float> %strided.vec, %strided.vec129
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%1 = fmul nnan ninf contract <2 x float> %strided.vec126, %strided.vec128
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%2 = fadd nnan ninf contract <2 x float> %1, %0
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%3 = fmul nnan ninf contract <2 x float> %strided.vec, %strided.vec128
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%4 = fmul nnan ninf contract <2 x float> %strided.vec126, %strided.vec129
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%5 = fsub nnan ninf contract <2 x float> %3, %4
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store <2 x float> %5, ptr %p1
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%strided.vec131 = shufflevector <4 x float> %c, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec132 = shufflevector <4 x float> %c, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%strided.vec134 = shufflevector <4 x float> %d, <4 x float> poison, <2 x i32> <i32 0, i32 2>
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%strided.vec135 = shufflevector <4 x float> %d, <4 x float> poison, <2 x i32> <i32 1, i32 3>
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%6 = fmul nnan ninf contract <2 x float> %strided.vec131, %strided.vec135
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%7 = fmul nnan ninf contract <2 x float> %strided.vec132, %strided.vec134
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%8 = fadd nnan ninf contract <2 x float> %7, %6
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%9 = fmul nnan ninf contract <2 x float> %strided.vec131, %strided.vec134
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%10 = fmul nnan ninf contract <2 x float> %strided.vec132, %strided.vec135
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%11 = fsub nnan ninf contract <2 x float> %9, %10
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%12 = fmul nnan ninf contract <2 x float> %5, %8
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%13 = fmul nnan ninf contract <2 x float> %2, %11
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%14 = fadd nnan ninf contract <2 x float> %13, %12
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%15 = fmul nnan ninf contract <2 x float> %5, %11
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%16 = fmul nnan ninf contract <2 x float> %2, %8
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%17 = fsub nnan ninf contract <2 x float> %15, %16
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%interleaved.vec = shufflevector <2 x float> %17, <2 x float> %14, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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store <4 x float> %interleaved.vec, ptr %p2
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%interleaved.vec136 = shufflevector <2 x float> %11, <2 x float> %8, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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ret <4 x float> %interleaved.vec136
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}
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