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powerpc/64s: Rewrite __real_pte() and __rpte_to_hidx() as static inline
Rewrite __real_pte() and __rpte_to_hidx() as static inline in order to avoid following warnings/errors when building with 4k page size: CC arch/powerpc/mm/book3s64/hash_tlb.o arch/powerpc/mm/book3s64/hash_tlb.c: In function 'hpte_need_flush': arch/powerpc/mm/book3s64/hash_tlb.c:49:16: error: variable 'offset' set but not used [-Werror=unused-but-set-variable] 49 | int i, offset; | ^~~~~~ CC arch/powerpc/mm/book3s64/hash_native.o arch/powerpc/mm/book3s64/hash_native.c: In function 'native_flush_hash_range': arch/powerpc/mm/book3s64/hash_native.c:782:29: error: variable 'index' set but not used [-Werror=unused-but-set-variable] 782 | unsigned long hash, index, hidx, shift, slot; | ^~~~~ Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202501081741.AYFwybsq-lkp@intel.com/ Fixes: ff31e10 ("powerpc/mm/hash64: Store the slot information at the right offset for hugetlb") Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Reviewed-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/e0d340a5b7bd478ecbf245d826e6ab2778b74e06.1736706263.git.christophe.leroy@csgroup.eu
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arch/powerpc/include/asm/book3s/64/hash-4k.h

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -77,9 +77,17 @@
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/*
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* With 4K page size the real_pte machinery is all nops.
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*/
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#define __real_pte(e, p, o) ((real_pte_t){(e)})
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static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep, int offset)
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{
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return (real_pte_t){pte};
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}
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#define __rpte_to_pte(r) ((r).pte)
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#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT)
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static inline unsigned long __rpte_to_hidx(real_pte_t rpte, unsigned long index)
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{
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return pte_val(__rpte_to_pte(rpte)) >> H_PAGE_F_GIX_SHIFT;
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}
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#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
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do { \

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