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Description
The MMC5 implementation currently has a few minor inaccuracies, mostly due to assuming it behaves just like the pulse and DPCM channels of the internal APU.
- Frequency values less than 8 do not silence the MMC5 pulse channels; they can output ultrasonic frequencies.
- Length counter operates twice as fast as the APU length counter (might be clocked at the envelope rate).
- The polarity of all MMC5 channels is reversed compared to the APU.
- The raw PCM channel uses all 8 bits, not 7.
- The IRQ register $5010 is unimplemented - it has the flag for Read/Write mode for the PCM channel and an IRQ enable bit.
Most likely, the Nes_Mmc5_Apu class needs to stop being a subclass of Nes_Apu, and instead have its own PCM implementation, and use composition (instead of inheritance) to share code for the square wave channels.
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