Merge from 'sycl' to 'sycl-web'

Author: iclsrc

.github/CODEOWNERS

@@ -1,4 +1,4 @@
-* @bader
+* @pvchupin
 
 # Front-end compiler
 clang/ @intel/dpcpp-cfe-reviewers
@@ -48,7 +48,7 @@ xptifw/ @intel/llvm-reviewers-runtime
 llvm/ @intel/dpcpp-tools-reviewers
 
 # Clang offload tools
-clang/tools/clang-offload-*/ @sndmitriev @intel/dpcpp-tools-reviewers
+clang/tools/clang-offload-*/ @intel/dpcpp-tools-reviewers
 
 # Explicit SIMD
 ESIMD/ @intel/dpcpp-esimd-reviewers

buildbot/dependency.conf

@@ -4,8 +4,8 @@ ocl_cpu_rt_ver=2022.13.3.0.16
 # https://github.com/intel/llvm/releases/download/2022-WW13/win-oclcpuexp-2022.13.3.0.16_rel.zip
 ocl_cpu_rt_ver_win=2022.13.3.0.16
 # Same GPU driver supports Level Zero and OpenCL
-# https://github.com/intel/compute-runtime/releases/tag/22.10.22597
-ocl_gpu_rt_ver=22.10.22597
+# https://github.com/intel/compute-runtime/releases/tag/22.15.22905
+ocl_gpu_rt_ver=22.15.22905
 # Same GPU driver supports Level Zero and OpenCL
 # https://downloadmirror.intel.com/723911/igfx_win_101.1404.zip
 ocl_gpu_rt_ver_win=101.1404
@@ -31,7 +31,7 @@ ocloc_ver_win=101.1404
 [DRIVER VERSIONS]
 cpu_driver_lin=2022.13.3.0.16
 cpu_driver_win=2022.13.3.0.16
-gpu_driver_lin=22.10.22597
+gpu_driver_lin=22.15.22905
 gpu_driver_win=101.1404
 fpga_driver_lin=2022.13.3.0.16
 fpga_driver_win=2022.13.3.0.16

sycl/plugins/level_zero/pi_level_zero.cpp

@@ -2838,12 +2838,14 @@ pi_result piDeviceGetInfo(pi_device Device, pi_device_info ParamName,
     }
     ZesStruct<zes_pci_properties_t> ZeDevicePciProperties;
     ZE_CALL(zesDevicePciGetProperties, (ZeDevice, &ZeDevicePciProperties));
-    std::stringstream ss;
-    ss << ZeDevicePciProperties.address.domain << ":"
-       << ZeDevicePciProperties.address.bus << ":"
-       << ZeDevicePciProperties.address.device << "."
-       << ZeDevicePciProperties.address.function;
-    return ReturnValue(ss.str().c_str());
+    constexpr size_t AddressBufferSize = 13;
+    char AddressBuffer[AddressBufferSize];
+    std::snprintf(AddressBuffer, AddressBufferSize, "%04x:%02x:%02x.%01x",
+                  ZeDevicePciProperties.address.domain,
+                  ZeDevicePciProperties.address.bus,
+                  ZeDevicePciProperties.address.device,
+                  ZeDevicePciProperties.address.function);
+    return ReturnValue(AddressBuffer);
   }
   case PI_DEVICE_INFO_GPU_EU_COUNT: {
     pi_uint32 count = Device->ZeDeviceProperties->numEUsPerSubslice *

sycl/source/detail/device_impl.cpp

@@ -315,8 +315,8 @@ bool device_impl::has(aspect Aspect) const {
     return get_info<info::device::usm_system_allocations>();
   case aspect::ext_intel_pci_address:
     return getPlugin().call_nocheck<detail::PiApiKind::piDeviceGetInfo>(
-               MDevice, PI_DEVICE_INFO_PCI_ADDRESS, sizeof(pi_device_type),
-               &device_type, &return_size) == PI_SUCCESS;
+               MDevice, PI_DEVICE_INFO_PCI_ADDRESS, 0, nullptr, &return_size) ==
+           PI_SUCCESS;
   case aspect::ext_intel_gpu_eu_count:
     return getPlugin().call_nocheck<detail::PiApiKind::piDeviceGetInfo>(
                MDevice, PI_DEVICE_INFO_GPU_EU_COUNT, sizeof(pi_device_type),