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[ELF] Move updateARMVFPArgs/updateARMVFPArgs. NFC
To reduce diff for D130810.
1 parent 91e8079 commit e2a932d

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‎lld/ELF/InputFiles.cpp

Lines changed: 86 additions & 86 deletions
Original file line numberDiff line numberDiff line change
@@ -89,6 +89,92 @@ static ELFKind getELFKind(MemoryBufferRef mb, StringRef archiveName) {
8989
return (endian == ELFDATA2LSB) ? ELF64LEKind : ELF64BEKind;
9090
}
9191

92+
// For ARM only, to set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD
93+
// flag in the ELF Header we need to look at Tag_ABI_VFP_args to find out how
94+
// the input objects have been compiled.
95+
static void updateARMVFPArgs(const ARMAttributeParser &attributes,
96+
const InputFile *f) {
97+
Optional<unsigned> attr =
98+
attributes.getAttributeValue(ARMBuildAttrs::ABI_VFP_args);
99+
if (!attr)
100+
// If an ABI tag isn't present then it is implicitly given the value of 0
101+
// which maps to ARMBuildAttrs::BaseAAPCS. However many assembler files,
102+
// including some in glibc that don't use FP args (and should have value 3)
103+
// don't have the attribute so we do not consider an implicit value of 0
104+
// as a clash.
105+
return;
106+
107+
unsigned vfpArgs = *attr;
108+
ARMVFPArgKind arg;
109+
switch (vfpArgs) {
110+
case ARMBuildAttrs::BaseAAPCS:
111+
arg = ARMVFPArgKind::Base;
112+
break;
113+
case ARMBuildAttrs::HardFPAAPCS:
114+
arg = ARMVFPArgKind::VFP;
115+
break;
116+
case ARMBuildAttrs::ToolChainFPPCS:
117+
// Tool chain specific convention that conforms to neither AAPCS variant.
118+
arg = ARMVFPArgKind::ToolChain;
119+
break;
120+
case ARMBuildAttrs::CompatibleFPAAPCS:
121+
// Object compatible with all conventions.
122+
return;
123+
default:
124+
error(toString(f) + ": unknown Tag_ABI_VFP_args value: " + Twine(vfpArgs));
125+
return;
126+
}
127+
// Follow ld.bfd and error if there is a mix of calling conventions.
128+
if (config->armVFPArgs != arg && config->armVFPArgs != ARMVFPArgKind::Default)
129+
error(toString(f) + ": incompatible Tag_ABI_VFP_args");
130+
else
131+
config->armVFPArgs = arg;
132+
}
133+
134+
// The ARM support in lld makes some use of instructions that are not available
135+
// on all ARM architectures. Namely:
136+
// - Use of BLX instruction for interworking between ARM and Thumb state.
137+
// - Use of the extended Thumb branch encoding in relocation.
138+
// - Use of the MOVT/MOVW instructions in Thumb Thunks.
139+
// The ARM Attributes section contains information about the architecture chosen
140+
// at compile time. We follow the convention that if at least one input object
141+
// is compiled with an architecture that supports these features then lld is
142+
// permitted to use them.
143+
static void updateSupportedARMFeatures(const ARMAttributeParser &attributes) {
144+
Optional<unsigned> attr =
145+
attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
146+
if (!attr)
147+
return;
148+
auto arch = attr.value();
149+
switch (arch) {
150+
case ARMBuildAttrs::Pre_v4:
151+
case ARMBuildAttrs::v4:
152+
case ARMBuildAttrs::v4T:
153+
// Architectures prior to v5 do not support BLX instruction
154+
break;
155+
case ARMBuildAttrs::v5T:
156+
case ARMBuildAttrs::v5TE:
157+
case ARMBuildAttrs::v5TEJ:
158+
case ARMBuildAttrs::v6:
159+
case ARMBuildAttrs::v6KZ:
160+
case ARMBuildAttrs::v6K:
161+
config->armHasBlx = true;
162+
// Architectures used in pre-Cortex processors do not support
163+
// The J1 = 1 J2 = 1 Thumb branch range extension, with the exception
164+
// of Architecture v6T2 (arm1156t2-s and arm1156t2f-s) that do.
165+
break;
166+
default:
167+
// All other Architectures have BLX and extended branch encoding
168+
config->armHasBlx = true;
169+
config->armJ1J2BranchEncoding = true;
170+
if (arch != ARMBuildAttrs::v6_M && arch != ARMBuildAttrs::v6S_M)
171+
// All Architectures used in Cortex processors with the exception
172+
// of v6-M and v6S-M have the MOVT and MOVW instructions.
173+
config->armHasMovtMovw = true;
174+
break;
175+
}
176+
}
177+
92178
InputFile::InputFile(Kind k, MemoryBufferRef m)
93179
: mb(m), groupId(nextGroupId), fileKind(k) {
94180
// All files within the same --{start,end}-group get the same group ID.
@@ -683,92 +769,6 @@ void ObjFile<ELFT>::initializeSections(bool ignoreComdats,
683769
handleSectionGroup<ELFT>(this->sections, entries);
684770
}
685771

686-
// For ARM only, to set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD
687-
// flag in the ELF Header we need to look at Tag_ABI_VFP_args to find out how
688-
// the input objects have been compiled.
689-
static void updateARMVFPArgs(const ARMAttributeParser &attributes,
690-
const InputFile *f) {
691-
Optional<unsigned> attr =
692-
attributes.getAttributeValue(ARMBuildAttrs::ABI_VFP_args);
693-
if (!attr)
694-
// If an ABI tag isn't present then it is implicitly given the value of 0
695-
// which maps to ARMBuildAttrs::BaseAAPCS. However many assembler files,
696-
// including some in glibc that don't use FP args (and should have value 3)
697-
// don't have the attribute so we do not consider an implicit value of 0
698-
// as a clash.
699-
return;
700-
701-
unsigned vfpArgs = *attr;
702-
ARMVFPArgKind arg;
703-
switch (vfpArgs) {
704-
case ARMBuildAttrs::BaseAAPCS:
705-
arg = ARMVFPArgKind::Base;
706-
break;
707-
case ARMBuildAttrs::HardFPAAPCS:
708-
arg = ARMVFPArgKind::VFP;
709-
break;
710-
case ARMBuildAttrs::ToolChainFPPCS:
711-
// Tool chain specific convention that conforms to neither AAPCS variant.
712-
arg = ARMVFPArgKind::ToolChain;
713-
break;
714-
case ARMBuildAttrs::CompatibleFPAAPCS:
715-
// Object compatible with all conventions.
716-
return;
717-
default:
718-
error(toString(f) + ": unknown Tag_ABI_VFP_args value: " + Twine(vfpArgs));
719-
return;
720-
}
721-
// Follow ld.bfd and error if there is a mix of calling conventions.
722-
if (config->armVFPArgs != arg && config->armVFPArgs != ARMVFPArgKind::Default)
723-
error(toString(f) + ": incompatible Tag_ABI_VFP_args");
724-
else
725-
config->armVFPArgs = arg;
726-
}
727-
728-
// The ARM support in lld makes some use of instructions that are not available
729-
// on all ARM architectures. Namely:
730-
// - Use of BLX instruction for interworking between ARM and Thumb state.
731-
// - Use of the extended Thumb branch encoding in relocation.
732-
// - Use of the MOVT/MOVW instructions in Thumb Thunks.
733-
// The ARM Attributes section contains information about the architecture chosen
734-
// at compile time. We follow the convention that if at least one input object
735-
// is compiled with an architecture that supports these features then lld is
736-
// permitted to use them.
737-
static void updateSupportedARMFeatures(const ARMAttributeParser &attributes) {
738-
Optional<unsigned> attr =
739-
attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
740-
if (!attr)
741-
return;
742-
auto arch = attr.value();
743-
switch (arch) {
744-
case ARMBuildAttrs::Pre_v4:
745-
case ARMBuildAttrs::v4:
746-
case ARMBuildAttrs::v4T:
747-
// Architectures prior to v5 do not support BLX instruction
748-
break;
749-
case ARMBuildAttrs::v5T:
750-
case ARMBuildAttrs::v5TE:
751-
case ARMBuildAttrs::v5TEJ:
752-
case ARMBuildAttrs::v6:
753-
case ARMBuildAttrs::v6KZ:
754-
case ARMBuildAttrs::v6K:
755-
config->armHasBlx = true;
756-
// Architectures used in pre-Cortex processors do not support
757-
// The J1 = 1 J2 = 1 Thumb branch range extension, with the exception
758-
// of Architecture v6T2 (arm1156t2-s and arm1156t2f-s) that do.
759-
break;
760-
default:
761-
// All other Architectures have BLX and extended branch encoding
762-
config->armHasBlx = true;
763-
config->armJ1J2BranchEncoding = true;
764-
if (arch != ARMBuildAttrs::v6_M && arch != ARMBuildAttrs::v6S_M)
765-
// All Architectures used in Cortex processors with the exception
766-
// of v6-M and v6S-M have the MOVT and MOVW instructions.
767-
config->armHasMovtMovw = true;
768-
break;
769-
}
770-
}
771-
772772
// If a source file is compiled with x86 hardware-assisted call flow control
773773
// enabled, the generated object file contains feature flags indicating that
774774
// fact. This function reads the feature flags and returns it.

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