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[NFC][libclc][libspirv] Convert 3 files to unix line ending (#17402)
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3 files changed

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Lines changed: 101 additions & 101 deletions
Original file line numberDiff line numberDiff line change
@@ -1,101 +1,101 @@
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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include <atomic_helpers.h>
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#include <libspirv/spirv.h>
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#include <libspirv/spirv_types.h>
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extern int __clc_nvvm_reflect_arch();
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_CLC_OVERLOAD _CLC_DECL void __spirv_MemoryBarrier(unsigned int, unsigned int);
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#define __CLC_NVVM_ATOMIC_LOAD_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
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ADDR_SPACE, ADDR_SPACE_NV, ORDER) \
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switch (scope) { \
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case Invocation: \
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case Subgroup: \
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case Workgroup: { \
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TYPE_NV res = __nvvm##ORDER##_cta_ld##ADDR_SPACE_NV##TYPE_MANGLED_NV( \
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(ADDR_SPACE TYPE_NV *)pointer); \
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return *(TYPE *)&res; \
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} \
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case Device: { \
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TYPE_NV res = __nvvm##ORDER##_ld##ADDR_SPACE_NV##TYPE_MANGLED_NV( \
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(ADDR_SPACE TYPE_NV *)pointer); \
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return *(TYPE *)&res; \
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} \
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case CrossDevice: \
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default: { \
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TYPE_NV res = __nvvm##ORDER##_sys_ld##ADDR_SPACE_NV##TYPE_MANGLED_NV( \
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(ADDR_SPACE TYPE_NV *)pointer); \
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return *(TYPE *)&res; \
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} \
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}
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#define __CLC_NVVM_ATOMIC_LOAD_IMPL( \
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TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, ADDR_SPACE, \
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POINTER_AND_ADDR_SPACE_MANGLED, ADDR_SPACE_NV) \
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__attribute__((always_inline)) _CLC_DECL TYPE _Z18__spirv_\
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AtomicLoad##POINTER_AND_ADDR_SPACE_MANGLED##K##TYPE_MANGLED##N5__spv5\
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Scope4FlagENS1_19MemorySemanticsMask4FlagE( \
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const volatile ADDR_SPACE TYPE *pointer, enum Scope scope, \
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enum MemorySemanticsMask semantics) { \
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/* Semantics mask may include memory order, storage class and other info \
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Memory order is stored in the lowest 5 bits */ \
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unsigned int order = semantics & 0x1F; \
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if (__clc_nvvm_reflect_arch() >= 700) { \
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switch (order) { \
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case None: \
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__CLC_NVVM_ATOMIC_LOAD_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
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ADDR_SPACE, ADDR_SPACE_NV, ) \
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case Acquire: \
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__CLC_NVVM_ATOMIC_LOAD_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
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ADDR_SPACE, ADDR_SPACE_NV, _acquire) \
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break; \
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case SequentiallyConsistent: \
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__CLC_NVVM_FENCE_SC_SM70() \
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__CLC_NVVM_ATOMIC_LOAD_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
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ADDR_SPACE, ADDR_SPACE_NV, _acquire) \
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break; \
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} \
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} else { \
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TYPE_NV res = __nvvm_volatile_ld##ADDR_SPACE_NV##TYPE_MANGLED_NV( \
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(ADDR_SPACE TYPE_NV *)pointer); \
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switch (order) { \
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case None: \
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return *(TYPE *)&res; \
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case Acquire: { \
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__spirv_MemoryBarrier(scope, Acquire); \
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return *(TYPE *)&res; \
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} \
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} \
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} \
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__builtin_trap(); \
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__builtin_unreachable(); \
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}
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#define __CLC_NVVM_ATOMIC_LOAD(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV) \
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__CLC_NVVM_ATOMIC_LOAD_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, \
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__global, PU3AS1, _global_) \
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__CLC_NVVM_ATOMIC_LOAD_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, \
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__local, PU3AS3, _shared_) \
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__CLC_NVVM_ATOMIC_LOAD_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, , \
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P, _gen_)
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__CLC_NVVM_ATOMIC_LOAD(int, i, int, i)
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__CLC_NVVM_ATOMIC_LOAD(uint, j, int, i)
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__CLC_NVVM_ATOMIC_LOAD(long, l, long, l)
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__CLC_NVVM_ATOMIC_LOAD(ulong, m, long, l)
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__CLC_NVVM_ATOMIC_LOAD(float, f, float, f)
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#ifdef cl_khr_int64_base_atomics
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__CLC_NVVM_ATOMIC_LOAD(double, d, double, d)
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#endif
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#undef __CLC_NVVM_ATOMIC_LOAD_TYPES
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#undef __CLC_NVVM_ATOMIC_LOAD
101-
#undef __CLC_NVVM_ATOMIC_LOAD_IMPL
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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include <atomic_helpers.h>
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#include <libspirv/spirv.h>
11+
#include <libspirv/spirv_types.h>
12+
13+
extern int __clc_nvvm_reflect_arch();
14+
_CLC_OVERLOAD _CLC_DECL void __spirv_MemoryBarrier(unsigned int, unsigned int);
15+
16+
#define __CLC_NVVM_ATOMIC_LOAD_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
17+
ADDR_SPACE, ADDR_SPACE_NV, ORDER) \
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switch (scope) { \
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case Invocation: \
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case Subgroup: \
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case Workgroup: { \
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TYPE_NV res = __nvvm##ORDER##_cta_ld##ADDR_SPACE_NV##TYPE_MANGLED_NV( \
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(ADDR_SPACE TYPE_NV *)pointer); \
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return *(TYPE *)&res; \
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} \
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case Device: { \
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TYPE_NV res = __nvvm##ORDER##_ld##ADDR_SPACE_NV##TYPE_MANGLED_NV( \
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(ADDR_SPACE TYPE_NV *)pointer); \
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return *(TYPE *)&res; \
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} \
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case CrossDevice: \
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default: { \
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TYPE_NV res = __nvvm##ORDER##_sys_ld##ADDR_SPACE_NV##TYPE_MANGLED_NV( \
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(ADDR_SPACE TYPE_NV *)pointer); \
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return *(TYPE *)&res; \
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} \
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}
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39+
#define __CLC_NVVM_ATOMIC_LOAD_IMPL( \
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TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, ADDR_SPACE, \
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POINTER_AND_ADDR_SPACE_MANGLED, ADDR_SPACE_NV) \
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__attribute__((always_inline)) _CLC_DECL TYPE _Z18__spirv_\
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AtomicLoad##POINTER_AND_ADDR_SPACE_MANGLED##K##TYPE_MANGLED##N5__spv5\
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Scope4FlagENS1_19MemorySemanticsMask4FlagE( \
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const volatile ADDR_SPACE TYPE *pointer, enum Scope scope, \
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enum MemorySemanticsMask semantics) { \
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/* Semantics mask may include memory order, storage class and other info \
48+
Memory order is stored in the lowest 5 bits */ \
49+
unsigned int order = semantics & 0x1F; \
50+
if (__clc_nvvm_reflect_arch() >= 700) { \
51+
switch (order) { \
52+
case None: \
53+
__CLC_NVVM_ATOMIC_LOAD_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
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ADDR_SPACE, ADDR_SPACE_NV, ) \
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case Acquire: \
56+
__CLC_NVVM_ATOMIC_LOAD_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
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ADDR_SPACE, ADDR_SPACE_NV, _acquire) \
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break; \
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case SequentiallyConsistent: \
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__CLC_NVVM_FENCE_SC_SM70() \
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__CLC_NVVM_ATOMIC_LOAD_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, \
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ADDR_SPACE, ADDR_SPACE_NV, _acquire) \
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break; \
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} \
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} else { \
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TYPE_NV res = __nvvm_volatile_ld##ADDR_SPACE_NV##TYPE_MANGLED_NV( \
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(ADDR_SPACE TYPE_NV *)pointer); \
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switch (order) { \
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case None: \
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return *(TYPE *)&res; \
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case Acquire: { \
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__spirv_MemoryBarrier(scope, Acquire); \
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return *(TYPE *)&res; \
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} \
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} \
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} \
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__builtin_trap(); \
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__builtin_unreachable(); \
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}
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#define __CLC_NVVM_ATOMIC_LOAD(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV) \
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__CLC_NVVM_ATOMIC_LOAD_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, \
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__global, PU3AS1, _global_) \
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__CLC_NVVM_ATOMIC_LOAD_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, \
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__local, PU3AS3, _shared_) \
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__CLC_NVVM_ATOMIC_LOAD_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, , \
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P, _gen_)
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__CLC_NVVM_ATOMIC_LOAD(int, i, int, i)
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__CLC_NVVM_ATOMIC_LOAD(uint, j, int, i)
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__CLC_NVVM_ATOMIC_LOAD(long, l, long, l)
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__CLC_NVVM_ATOMIC_LOAD(ulong, m, long, l)
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__CLC_NVVM_ATOMIC_LOAD(float, f, float, f)
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#ifdef cl_khr_int64_base_atomics
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__CLC_NVVM_ATOMIC_LOAD(double, d, double, d)
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#endif
98+
99+
#undef __CLC_NVVM_ATOMIC_LOAD_TYPES
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#undef __CLC_NVVM_ATOMIC_LOAD
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#undef __CLC_NVVM_ATOMIC_LOAD_IMPL
Lines changed: 43 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -1,43 +1,43 @@
1-
//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4-
// See https://llvm.org/LICENSE.txt for license information.
5-
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
8-
9-
#include <libspirv/spirv.h>
10-
#include <libspirv/spirv_types.h>
11-
12-
#define __CLC_NVVM_ATOMIC_SUB_IMPL(TYPE, TYPE_MANGLED, OP_MANGLED, ADDR_SPACE, \
13-
POINTER_AND_ADDR_SPACE_MANGLED, \
14-
SUBSTITUTION) \
15-
TYPE _Z18__spirv_\
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AtomicIAdd##POINTER_AND_ADDR_SPACE_MANGLED##TYPE_MANGLED##N5__spv5Scope4FlagEN\
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S##SUBSTITUTION##_19MemorySemanticsMask4FlagE##TYPE_MANGLED( \
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volatile ADDR_SPACE TYPE *, enum Scope, enum MemorySemanticsMask, TYPE); \
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__attribute__((always_inline)) _CLC_DECL TYPE _Z18__spirv_\
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Atomic##OP_MANGLED##POINTER_AND_ADDR_SPACE_MANGLED##TYPE_MANGLED##N5__spv5Scope\
21-
4FlagENS##SUBSTITUTION##_19MemorySemanticsMask4FlagE##TYPE_MANGLED( \
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volatile ADDR_SPACE TYPE *pointer, enum Scope scope, \
23-
enum MemorySemanticsMask semantics, TYPE val) { \
24-
return _Z18__spirv_\
25-
AtomicIAdd##POINTER_AND_ADDR_SPACE_MANGLED##TYPE_MANGLED##N5__spv5Scope4FlagEN\
26-
S##SUBSTITUTION##_19MemorySemanticsMask4FlagE##TYPE_MANGLED(pointer, scope, \
27-
semantics, -val); \
28-
}
29-
30-
#define __CLC_NVVM_ATOMIC_SUB(TYPE, TYPE_MANGLED, OP_MANGLED) \
31-
__CLC_NVVM_ATOMIC_SUB_IMPL(TYPE, TYPE_MANGLED, OP_MANGLED, __global, PU3AS1, \
32-
1) \
33-
__CLC_NVVM_ATOMIC_SUB_IMPL(TYPE, TYPE_MANGLED, OP_MANGLED, __local, PU3AS3, \
34-
1) \
35-
__CLC_NVVM_ATOMIC_SUB_IMPL(TYPE, TYPE_MANGLED, OP_MANGLED, , P, 0)
36-
37-
__CLC_NVVM_ATOMIC_SUB(int, i, ISub)
38-
__CLC_NVVM_ATOMIC_SUB(unsigned int, j, ISub)
39-
__CLC_NVVM_ATOMIC_SUB(long, l, ISub)
40-
__CLC_NVVM_ATOMIC_SUB(unsigned long, m, ISub)
41-
42-
#undef __CLC_NVVM_ATOMIC_SUB_IMPL
43-
#undef __CLC_NVVM_ATOMIC_SUB
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//===----------------------------------------------------------------------===//
2+
//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
9+
#include <libspirv/spirv.h>
10+
#include <libspirv/spirv_types.h>
11+
12+
#define __CLC_NVVM_ATOMIC_SUB_IMPL(TYPE, TYPE_MANGLED, OP_MANGLED, ADDR_SPACE, \
13+
POINTER_AND_ADDR_SPACE_MANGLED, \
14+
SUBSTITUTION) \
15+
TYPE _Z18__spirv_\
16+
AtomicIAdd##POINTER_AND_ADDR_SPACE_MANGLED##TYPE_MANGLED##N5__spv5Scope4FlagEN\
17+
S##SUBSTITUTION##_19MemorySemanticsMask4FlagE##TYPE_MANGLED( \
18+
volatile ADDR_SPACE TYPE *, enum Scope, enum MemorySemanticsMask, TYPE); \
19+
__attribute__((always_inline)) _CLC_DECL TYPE _Z18__spirv_\
20+
Atomic##OP_MANGLED##POINTER_AND_ADDR_SPACE_MANGLED##TYPE_MANGLED##N5__spv5Scope\
21+
4FlagENS##SUBSTITUTION##_19MemorySemanticsMask4FlagE##TYPE_MANGLED( \
22+
volatile ADDR_SPACE TYPE *pointer, enum Scope scope, \
23+
enum MemorySemanticsMask semantics, TYPE val) { \
24+
return _Z18__spirv_\
25+
AtomicIAdd##POINTER_AND_ADDR_SPACE_MANGLED##TYPE_MANGLED##N5__spv5Scope4FlagEN\
26+
S##SUBSTITUTION##_19MemorySemanticsMask4FlagE##TYPE_MANGLED(pointer, scope, \
27+
semantics, -val); \
28+
}
29+
30+
#define __CLC_NVVM_ATOMIC_SUB(TYPE, TYPE_MANGLED, OP_MANGLED) \
31+
__CLC_NVVM_ATOMIC_SUB_IMPL(TYPE, TYPE_MANGLED, OP_MANGLED, __global, PU3AS1, \
32+
1) \
33+
__CLC_NVVM_ATOMIC_SUB_IMPL(TYPE, TYPE_MANGLED, OP_MANGLED, __local, PU3AS3, \
34+
1) \
35+
__CLC_NVVM_ATOMIC_SUB_IMPL(TYPE, TYPE_MANGLED, OP_MANGLED, , P, 0)
36+
37+
__CLC_NVVM_ATOMIC_SUB(int, i, ISub)
38+
__CLC_NVVM_ATOMIC_SUB(unsigned int, j, ISub)
39+
__CLC_NVVM_ATOMIC_SUB(long, l, ISub)
40+
__CLC_NVVM_ATOMIC_SUB(unsigned long, m, ISub)
41+
42+
#undef __CLC_NVVM_ATOMIC_SUB_IMPL
43+
#undef __CLC_NVVM_ATOMIC_SUB

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