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wenju-hewenju-he
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[SYCL] Change UConvert arg type to unsigned and SConvert arg type to signed (#19316)
To align with SPIR-V spec and SPV-IR in SPIRV-LLVM-Translator.
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‎clang/lib/Sema/SPIRVBuiltins.td

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -803,7 +803,7 @@ foreach rnd = ["", "_rte", "_rtn", "_rtp", "_rtz"] in {
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}
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805805
foreach sat = ["", "_sat"] in {
806-
foreach InType = TLAllInts.List in {
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foreach InType = TLUnsignedInts.List in {
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foreach OutType = TLUnsignedInts.List in {
808808
if !ne(OutType.ElementSize, InType.ElementSize) then {
809809
def : SPVBuiltin<"UConvert_R" # OutType.Name # sat, [OutType, InType], Attr.Const>;
@@ -814,6 +814,8 @@ foreach sat = ["", "_sat"] in {
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}
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}
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}
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}
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foreach InType = TLSignedInts.List in {
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foreach OutType = TLSignedInts.List in {
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if !ne(OutType.ElementSize, InType.ElementSize) then {
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def : SPVBuiltin<"SConvert_R" # OutType.Name # sat, [OutType, InType], Attr.Const>;

‎clang/test/CodeGenSPIRV/spirv-builtin-lookup-convert.cpp

Lines changed: 232 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,232 @@
1+
// RUN: %clang_cc1 -triple=spirv64 -fdeclare-spirv-builtins -emit-llvm %s -o - | FileCheck %s
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template <bool, typename If, typename Else> struct conditional_t {
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using T = If;
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};
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template <typename If, typename Else> struct conditional_t<false, If, Else> {
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using T = Else;
9+
};
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#define DEFINE_TEST_CONVERT_N(Op, N, DstTy, DstTyName, SrcTy, SrcTyName) \
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namespace Op##DstTyName##SrcTyName { \
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using DTy##N = \
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conditional_t<N == 1, DstTy, \
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DstTy __attribute__((ext_vector_type(N)))>::T; \
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using STy##N = \
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conditional_t<N == 1, SrcTy, \
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SrcTy __attribute__((ext_vector_type(N)))>::T; \
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DTy##N test_##Name##DstTyName(STy##N v) { \
20+
return __spirv_##Op##Convert_R##DstTyName(v); \
21+
} \
22+
STy##N test_##Name##SrcTyName(DTy##N v) { \
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return __spirv_##Op##Convert_R##SrcTyName(v); \
24+
} \
25+
}
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#define DEFINE_TEST_CONVERT(Op, DstTy, DstTySpvName, SrcTy, SrcTySpvName) \
28+
DEFINE_TEST_CONVERT_N(Op, 1, DstTy, DstTySpvName, SrcTy, SrcTySpvName) \
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DEFINE_TEST_CONVERT_N(Op, 2, DstTy, DstTySpvName##2, SrcTy, SrcTySpvName##2) \
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DEFINE_TEST_CONVERT_N(Op, 3, DstTy, DstTySpvName##3, SrcTy, SrcTySpvName##3) \
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DEFINE_TEST_CONVERT_N(Op, 4, DstTy, DstTySpvName##4, SrcTy, SrcTySpvName##4) \
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DEFINE_TEST_CONVERT_N(Op, 8, DstTy, DstTySpvName##8, SrcTy, SrcTySpvName##8) \
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DEFINE_TEST_CONVERT_N(Op, 16, DstTy, DstTySpvName##16, SrcTy, \
34+
SrcTySpvName##16)
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DEFINE_TEST_CONVERT(S, char, char, short, short)
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DEFINE_TEST_CONVERT(S, char, char, int, int)
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DEFINE_TEST_CONVERT(S, char, char, long, long)
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DEFINE_TEST_CONVERT(S, signed char, schar, int, int)
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DEFINE_TEST_CONVERT(S, signed char, schar, short, short)
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DEFINE_TEST_CONVERT(S, signed char, schar, long, long)
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DEFINE_TEST_CONVERT(S, short, short, int, int)
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DEFINE_TEST_CONVERT(S, short, short, long, long)
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DEFINE_TEST_CONVERT(S, int, int, long, long)
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DEFINE_TEST_CONVERT(U, unsigned char, uchar, unsigned short, ushort)
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DEFINE_TEST_CONVERT(U, unsigned char, uchar, unsigned int, uint)
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DEFINE_TEST_CONVERT(U, unsigned char, uchar, unsigned long, ulong)
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DEFINE_TEST_CONVERT(U, unsigned short, ushort, unsigned int, uint)
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DEFINE_TEST_CONVERT(U, unsigned short, ushort, unsigned long, ulong)
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DEFINE_TEST_CONVERT(U, unsigned int, uint, unsigned long, ulong)
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// CHECK: call {{.*}} signext i8 @_Z22__spirv_SConvert_Rchars
54+
// CHECK: call {{.*}} signext i16 @_Z23__spirv_SConvert_Rshortc
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// CHECK: call {{.*}} <2 x i8> @_Z23__spirv_SConvert_Rchar2Dv2_s
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// CHECK: call {{.*}} <2 x i16> @_Z24__spirv_SConvert_Rshort2Dv2_c
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// CHECK: call {{.*}} <3 x i8> @_Z23__spirv_SConvert_Rchar3Dv3_s
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// CHECK: call {{.*}} <3 x i16> @_Z24__spirv_SConvert_Rshort3Dv3_c
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// CHECK: call {{.*}} <4 x i8> @_Z23__spirv_SConvert_Rchar4Dv4_s
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// CHECK: call {{.*}} <4 x i16> @_Z24__spirv_SConvert_Rshort4Dv4_c
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// CHECK: call {{.*}} <8 x i8> @_Z23__spirv_SConvert_Rchar8Dv8_s
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// CHECK: call {{.*}} <8 x i16> @_Z24__spirv_SConvert_Rshort8Dv8_c
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// CHECK: call {{.*}} <16 x i8> @_Z24__spirv_SConvert_Rchar16Dv16_s
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// CHECK: call {{.*}} <16 x i16> @_Z25__spirv_SConvert_Rshort16Dv16_c
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// CHECK: call {{.*}} signext i8 @_Z22__spirv_SConvert_Rchari
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// CHECK: call {{.*}} i32 @_Z21__spirv_SConvert_Rintc
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// CHECK: call {{.*}} <2 x i8> @_Z23__spirv_SConvert_Rchar2Dv2_i
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// CHECK: call {{.*}} <2 x i32> @_Z22__spirv_SConvert_Rint2Dv2_c
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// CHECK: call {{.*}} <3 x i8> @_Z23__spirv_SConvert_Rchar3Dv3_i
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// CHECK: call {{.*}} <3 x i32> @_Z22__spirv_SConvert_Rint3Dv3_c
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// CHECK: call {{.*}} <4 x i8> @_Z23__spirv_SConvert_Rchar4Dv4_i
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// CHECK: call {{.*}} <4 x i32> @_Z22__spirv_SConvert_Rint4Dv4_c
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// CHECK: call {{.*}} <8 x i8> @_Z23__spirv_SConvert_Rchar8Dv8_i
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// CHECK: call {{.*}} <8 x i32> @_Z22__spirv_SConvert_Rint8Dv8_c
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// CHECK: call {{.*}} <16 x i8> @_Z24__spirv_SConvert_Rchar16Dv16_i
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// CHECK: call {{.*}} <16 x i32> @_Z23__spirv_SConvert_Rint16Dv16_c
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// CHECK: call {{.*}} signext i8 @_Z22__spirv_SConvert_Rcharl
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// CHECK: call {{.*}} i64 @_Z22__spirv_SConvert_Rlongc
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// CHECK: call {{.*}} <2 x i8> @_Z23__spirv_SConvert_Rchar2Dv2_l
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// CHECK: call {{.*}} <2 x i64> @_Z23__spirv_SConvert_Rlong2Dv2_c
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// CHECK: call {{.*}} <3 x i8> @_Z23__spirv_SConvert_Rchar3Dv3_l
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// CHECK: call {{.*}} <3 x i64> @_Z23__spirv_SConvert_Rlong3Dv3_c
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// CHECK: call {{.*}} <4 x i8> @_Z23__spirv_SConvert_Rchar4Dv4_l
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// CHECK: call {{.*}} <4 x i64> @_Z23__spirv_SConvert_Rlong4Dv4_c
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// CHECK: call {{.*}} <8 x i8> @_Z23__spirv_SConvert_Rchar8Dv8_l
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// CHECK: call {{.*}} <8 x i64> @_Z23__spirv_SConvert_Rlong8Dv8_c
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// CHECK: call {{.*}} <16 x i8> @_Z24__spirv_SConvert_Rchar16Dv16_l
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// CHECK: call {{.*}} <16 x i64> @_Z24__spirv_SConvert_Rlong16Dv16_c
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// CHECK: call {{.*}} signext i8 @_Z23__spirv_SConvert_Rschari
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// CHECK: call {{.*}} i32 @_Z21__spirv_SConvert_Rinta
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// CHECK: call {{.*}} <2 x i8> @_Z24__spirv_SConvert_Rschar2Dv2_i
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// CHECK: call {{.*}} <2 x i32> @_Z22__spirv_SConvert_Rint2Dv2_a
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// CHECK: call {{.*}} <3 x i8> @_Z24__spirv_SConvert_Rschar3Dv3_i
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// CHECK: call {{.*}} <3 x i32> @_Z22__spirv_SConvert_Rint3Dv3_a
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// CHECK: call {{.*}} <4 x i8> @_Z24__spirv_SConvert_Rschar4Dv4_i
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// CHECK: call {{.*}} <4 x i32> @_Z22__spirv_SConvert_Rint4Dv4_a
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// CHECK: call {{.*}} <8 x i8> @_Z24__spirv_SConvert_Rschar8Dv8_i
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// CHECK: call {{.*}} <8 x i32> @_Z22__spirv_SConvert_Rint8Dv8_a
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// CHECK: call {{.*}} <16 x i8> @_Z25__spirv_SConvert_Rschar16Dv16_i
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// CHECK: call {{.*}} <16 x i32> @_Z23__spirv_SConvert_Rint16Dv16_a
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// CHECK: call {{.*}} signext i8 @_Z23__spirv_SConvert_Rschars
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// CHECK: call {{.*}} signext i16 @_Z23__spirv_SConvert_Rshorta
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// CHECK: call {{.*}} <2 x i8> @_Z24__spirv_SConvert_Rschar2Dv2_s
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// CHECK: call {{.*}} <2 x i16> @_Z24__spirv_SConvert_Rshort2Dv2_a
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// CHECK: call {{.*}} <3 x i8> @_Z24__spirv_SConvert_Rschar3Dv3_s
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// CHECK: call {{.*}} <3 x i16> @_Z24__spirv_SConvert_Rshort3Dv3_a
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// CHECK: call {{.*}} <4 x i8> @_Z24__spirv_SConvert_Rschar4Dv4_s
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// CHECK: call {{.*}} <4 x i16> @_Z24__spirv_SConvert_Rshort4Dv4_a
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// CHECK: call {{.*}} <8 x i8> @_Z24__spirv_SConvert_Rschar8Dv8_s
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// CHECK: call {{.*}} <8 x i16> @_Z24__spirv_SConvert_Rshort8Dv8_a
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// CHECK: call {{.*}} <16 x i8> @_Z25__spirv_SConvert_Rschar16Dv16_s
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// CHECK: call {{.*}} <16 x i16> @_Z25__spirv_SConvert_Rshort16Dv16_a
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// CHECK: call {{.*}} signext i8 @_Z23__spirv_SConvert_Rscharl
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// CHECK: call {{.*}} i64 @_Z22__spirv_SConvert_Rlonga
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// CHECK: call {{.*}} <2 x i8> @_Z24__spirv_SConvert_Rschar2Dv2_l
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// CHECK: call {{.*}} <2 x i64> @_Z23__spirv_SConvert_Rlong2Dv2_a
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// CHECK: call {{.*}} <3 x i8> @_Z24__spirv_SConvert_Rschar3Dv3_l
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// CHECK: call {{.*}} <3 x i64> @_Z23__spirv_SConvert_Rlong3Dv3_a
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// CHECK: call {{.*}} <4 x i8> @_Z24__spirv_SConvert_Rschar4Dv4_l
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// CHECK: call {{.*}} <4 x i64> @_Z23__spirv_SConvert_Rlong4Dv4_a
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// CHECK: call {{.*}} <8 x i8> @_Z24__spirv_SConvert_Rschar8Dv8_l
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// CHECK: call {{.*}} <8 x i64> @_Z23__spirv_SConvert_Rlong8Dv8_a
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// CHECK: call {{.*}} <16 x i8> @_Z25__spirv_SConvert_Rschar16Dv16_l
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// CHECK: call {{.*}} <16 x i64> @_Z24__spirv_SConvert_Rlong16Dv16_a
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// CHECK: call {{.*}} signext i16 @_Z23__spirv_SConvert_Rshorti
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// CHECK: call {{.*}} i32 @_Z21__spirv_SConvert_Rints
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// CHECK: call {{.*}} <2 x i16> @_Z24__spirv_SConvert_Rshort2Dv2_i
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// CHECK: call {{.*}} <2 x i32> @_Z22__spirv_SConvert_Rint2Dv2_s
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// CHECK: call {{.*}} <3 x i16> @_Z24__spirv_SConvert_Rshort3Dv3_i
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// CHECK: call {{.*}} <3 x i32> @_Z22__spirv_SConvert_Rint3Dv3_s
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// CHECK: call {{.*}} <4 x i16> @_Z24__spirv_SConvert_Rshort4Dv4_i
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// CHECK: call {{.*}} <4 x i32> @_Z22__spirv_SConvert_Rint4Dv4_s
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// CHECK: call {{.*}} <8 x i16> @_Z24__spirv_SConvert_Rshort8Dv8_i
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// CHECK: call {{.*}} <8 x i32> @_Z22__spirv_SConvert_Rint8Dv8_s
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// CHECK: call {{.*}} <16 x i16> @_Z25__spirv_SConvert_Rshort16Dv16_i
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// CHECK: call {{.*}} <16 x i32> @_Z23__spirv_SConvert_Rint16Dv16_s
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// CHECK: call {{.*}} signext i16 @_Z23__spirv_SConvert_Rshortl
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// CHECK: call {{.*}} i64 @_Z22__spirv_SConvert_Rlongs
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// CHECK: call {{.*}} <2 x i16> @_Z24__spirv_SConvert_Rshort2Dv2_l
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// CHECK: call {{.*}} <2 x i64> @_Z23__spirv_SConvert_Rlong2Dv2_s
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// CHECK: call {{.*}} <3 x i16> @_Z24__spirv_SConvert_Rshort3Dv3_l
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// CHECK: call {{.*}} <3 x i64> @_Z23__spirv_SConvert_Rlong3Dv3_s
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// CHECK: call {{.*}} <4 x i16> @_Z24__spirv_SConvert_Rshort4Dv4_l
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// CHECK: call {{.*}} <4 x i64> @_Z23__spirv_SConvert_Rlong4Dv4_s
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// CHECK: call {{.*}} <8 x i16> @_Z24__spirv_SConvert_Rshort8Dv8_l
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// CHECK: call {{.*}} <8 x i64> @_Z23__spirv_SConvert_Rlong8Dv8_s
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// CHECK: call {{.*}} <16 x i16> @_Z25__spirv_SConvert_Rshort16Dv16_l
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// CHECK: call {{.*}} <16 x i64> @_Z24__spirv_SConvert_Rlong16Dv16_s
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// CHECK: call {{.*}} i32 @_Z21__spirv_SConvert_Rintl
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// CHECK: call {{.*}} i64 @_Z22__spirv_SConvert_Rlongi
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// CHECK: call {{.*}} <2 x i32> @_Z22__spirv_SConvert_Rint2Dv2_l
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// CHECK: call {{.*}} <2 x i64> @_Z23__spirv_SConvert_Rlong2Dv2_i
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// CHECK: call {{.*}} <3 x i32> @_Z22__spirv_SConvert_Rint3Dv3_l
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// CHECK: call {{.*}} <3 x i64> @_Z23__spirv_SConvert_Rlong3Dv3_i
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// CHECK: call {{.*}} <4 x i32> @_Z22__spirv_SConvert_Rint4Dv4_l
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// CHECK: call {{.*}} <4 x i64> @_Z23__spirv_SConvert_Rlong4Dv4_i
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// CHECK: call {{.*}} <8 x i32> @_Z22__spirv_SConvert_Rint8Dv8_l
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// CHECK: call {{.*}} <8 x i64> @_Z23__spirv_SConvert_Rlong8Dv8_i
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// CHECK: call {{.*}} <16 x i32> @_Z23__spirv_SConvert_Rint16Dv16_l
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// CHECK: call {{.*}} <16 x i64> @_Z24__spirv_SConvert_Rlong16Dv16_i
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// CHECK: call {{.*}} zeroext i8 @_Z23__spirv_UConvert_Ruchart
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// CHECK: call {{.*}} zeroext i16 @_Z24__spirv_UConvert_Rushorth
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// CHECK: call {{.*}} <2 x i8> @_Z24__spirv_UConvert_Ruchar2Dv2_t
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// CHECK: call {{.*}} <2 x i16> @_Z25__spirv_UConvert_Rushort2Dv2_h
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// CHECK: call {{.*}} <3 x i8> @_Z24__spirv_UConvert_Ruchar3Dv3_t
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// CHECK: call {{.*}} <3 x i16> @_Z25__spirv_UConvert_Rushort3Dv3_h
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// CHECK: call {{.*}} <4 x i8> @_Z24__spirv_UConvert_Ruchar4Dv4_t
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// CHECK: call {{.*}} <4 x i16> @_Z25__spirv_UConvert_Rushort4Dv4_h
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// CHECK: call {{.*}} <8 x i8> @_Z24__spirv_UConvert_Ruchar8Dv8_t
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// CHECK: call {{.*}} <8 x i16> @_Z25__spirv_UConvert_Rushort8Dv8_h
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// CHECK: call {{.*}} <16 x i8> @_Z25__spirv_UConvert_Ruchar16Dv16_t
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// CHECK: call {{.*}} <16 x i16> @_Z26__spirv_UConvert_Rushort16Dv16_h
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// CHECK: call {{.*}} zeroext i8 @_Z23__spirv_UConvert_Rucharj
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// CHECK: call {{.*}} i32 @_Z22__spirv_UConvert_Ruinth
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// CHECK: call {{.*}} <2 x i8> @_Z24__spirv_UConvert_Ruchar2Dv2_j
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// CHECK: call {{.*}} <2 x i32> @_Z23__spirv_UConvert_Ruint2Dv2_h
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// CHECK: call {{.*}} <3 x i8> @_Z24__spirv_UConvert_Ruchar3Dv3_j
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// CHECK: call {{.*}} <3 x i32> @_Z23__spirv_UConvert_Ruint3Dv3_h
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// CHECK: call {{.*}} <4 x i8> @_Z24__spirv_UConvert_Ruchar4Dv4_j
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// CHECK: call {{.*}} <4 x i32> @_Z23__spirv_UConvert_Ruint4Dv4_h
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// CHECK: call {{.*}} <8 x i8> @_Z24__spirv_UConvert_Ruchar8Dv8_j
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// CHECK: call {{.*}} <8 x i32> @_Z23__spirv_UConvert_Ruint8Dv8_h
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// CHECK: call {{.*}} <16 x i8> @_Z25__spirv_UConvert_Ruchar16Dv16_j
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// CHECK: call {{.*}} <16 x i32> @_Z24__spirv_UConvert_Ruint16Dv16_h
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// CHECK: call {{.*}} zeroext i8 @_Z23__spirv_UConvert_Rucharm
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// CHECK: call {{.*}} i64 @_Z23__spirv_UConvert_Rulongh
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// CHECK: call {{.*}} <2 x i8> @_Z24__spirv_UConvert_Ruchar2Dv2_m
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// CHECK: call {{.*}} <2 x i64> @_Z24__spirv_UConvert_Rulong2Dv2_h
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// CHECK: call {{.*}} <3 x i8> @_Z24__spirv_UConvert_Ruchar3Dv3_m
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// CHECK: call {{.*}} <3 x i64> @_Z24__spirv_UConvert_Rulong3Dv3_h
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// CHECK: call {{.*}} <4 x i8> @_Z24__spirv_UConvert_Ruchar4Dv4_m
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// CHECK: call {{.*}} <4 x i64> @_Z24__spirv_UConvert_Rulong4Dv4_h
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// CHECK: call {{.*}} <8 x i8> @_Z24__spirv_UConvert_Ruchar8Dv8_m
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// CHECK: call {{.*}} <8 x i64> @_Z24__spirv_UConvert_Rulong8Dv8_h
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// CHECK: call {{.*}} <16 x i8> @_Z25__spirv_UConvert_Ruchar16Dv16_m
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// CHECK: call {{.*}} <16 x i64> @_Z25__spirv_UConvert_Rulong16Dv16_h
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// CHECK: call {{.*}} zeroext i16 @_Z24__spirv_UConvert_Rushortj
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// CHECK: call {{.*}} i32 @_Z22__spirv_UConvert_Ruintt
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// CHECK: call {{.*}} <2 x i16> @_Z25__spirv_UConvert_Rushort2Dv2_j
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// CHECK: call {{.*}} <2 x i32> @_Z23__spirv_UConvert_Ruint2Dv2_t
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// CHECK: call {{.*}} <3 x i16> @_Z25__spirv_UConvert_Rushort3Dv3_j
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// CHECK: call {{.*}} <3 x i32> @_Z23__spirv_UConvert_Ruint3Dv3_t
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// CHECK: call {{.*}} <4 x i16> @_Z25__spirv_UConvert_Rushort4Dv4_j
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// CHECK: call {{.*}} <4 x i32> @_Z23__spirv_UConvert_Ruint4Dv4_t
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// CHECK: call {{.*}} <8 x i16> @_Z25__spirv_UConvert_Rushort8Dv8_j
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// CHECK: call {{.*}} <8 x i32> @_Z23__spirv_UConvert_Ruint8Dv8_t
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// CHECK: call {{.*}} <16 x i16> @_Z26__spirv_UConvert_Rushort16Dv16_j
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// CHECK: call {{.*}} <16 x i32> @_Z24__spirv_UConvert_Ruint16Dv16_t
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// CHECK: call {{.*}} zeroext i16 @_Z24__spirv_UConvert_Rushortm
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// CHECK: call {{.*}} i64 @_Z23__spirv_UConvert_Rulongt
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// CHECK: call {{.*}} <2 x i16> @_Z25__spirv_UConvert_Rushort2Dv2_m
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// CHECK: call {{.*}} <2 x i64> @_Z24__spirv_UConvert_Rulong2Dv2_t
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// CHECK: call {{.*}} <3 x i16> @_Z25__spirv_UConvert_Rushort3Dv3_m
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// CHECK: call {{.*}} <3 x i64> @_Z24__spirv_UConvert_Rulong3Dv3_t
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// CHECK: call {{.*}} <4 x i16> @_Z25__spirv_UConvert_Rushort4Dv4_m
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// CHECK: call {{.*}} <4 x i64> @_Z24__spirv_UConvert_Rulong4Dv4_t
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// CHECK: call {{.*}} <8 x i16> @_Z25__spirv_UConvert_Rushort8Dv8_m
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// CHECK: call {{.*}} <8 x i64> @_Z24__spirv_UConvert_Rulong8Dv8_t
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// CHECK: call {{.*}} <16 x i16> @_Z26__spirv_UConvert_Rushort16Dv16_m
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// CHECK: call {{.*}} <16 x i64> @_Z25__spirv_UConvert_Rulong16Dv16_t
221+
// CHECK: call {{.*}} i32 @_Z22__spirv_UConvert_Ruintm
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// CHECK: call {{.*}} i64 @_Z23__spirv_UConvert_Rulongj
223+
// CHECK: call {{.*}} <2 x i32> @_Z23__spirv_UConvert_Ruint2Dv2_m
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// CHECK: call {{.*}} <2 x i64> @_Z24__spirv_UConvert_Rulong2Dv2_j
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// CHECK: call {{.*}} <3 x i32> @_Z23__spirv_UConvert_Ruint3Dv3_m
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// CHECK: call {{.*}} <3 x i64> @_Z24__spirv_UConvert_Rulong3Dv3_j
227+
// CHECK: call {{.*}} <4 x i32> @_Z23__spirv_UConvert_Ruint4Dv4_m
228+
// CHECK: call {{.*}} <4 x i64> @_Z24__spirv_UConvert_Rulong4Dv4_j
229+
// CHECK: call {{.*}} <8 x i32> @_Z23__spirv_UConvert_Ruint8Dv8_m
230+
// CHECK: call {{.*}} <8 x i64> @_Z24__spirv_UConvert_Rulong8Dv8_j
231+
// CHECK: call {{.*}} <16 x i32> @_Z24__spirv_UConvert_Ruint16Dv16_m
232+
// CHECK: call {{.*}} <16 x i64> @_Z25__spirv_UConvert_Rulong16Dv16_j

‎libclc/test/binding/core/SConvert_Rchar.cl

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -20,27 +20,12 @@ test___spirv_SConvert_Rchar(__clc_int16_t args_0) {
2020
return __spirv_SConvert_Rchar(args_0);
2121
}
2222

23-
__attribute__((overloadable)) __clc_int8_t
24-
test___spirv_SConvert_Rchar(__clc_uint16_t args_0) {
25-
return __spirv_SConvert_Rchar(args_0);
26-
}
27-
2823
__attribute__((overloadable)) __clc_int8_t
2924
test___spirv_SConvert_Rchar(__clc_int32_t args_0) {
3025
return __spirv_SConvert_Rchar(args_0);
3126
}
3227

33-
__attribute__((overloadable)) __clc_int8_t
34-
test___spirv_SConvert_Rchar(__clc_uint32_t args_0) {
35-
return __spirv_SConvert_Rchar(args_0);
36-
}
37-
3828
__attribute__((overloadable)) __clc_int8_t
3929
test___spirv_SConvert_Rchar(__clc_int64_t args_0) {
4030
return __spirv_SConvert_Rchar(args_0);
4131
}
42-
43-
__attribute__((overloadable)) __clc_int8_t
44-
test___spirv_SConvert_Rchar(__clc_uint64_t args_0) {
45-
return __spirv_SConvert_Rchar(args_0);
46-
}

‎libclc/test/binding/core/SConvert_Rchar16.cl

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -20,27 +20,12 @@ test___spirv_SConvert_Rchar16(__clc_vec16_int16_t args_0) {
2020
return __spirv_SConvert_Rchar16(args_0);
2121
}
2222

23-
__attribute__((overloadable)) __clc_vec16_int8_t
24-
test___spirv_SConvert_Rchar16(__clc_vec16_uint16_t args_0) {
25-
return __spirv_SConvert_Rchar16(args_0);
26-
}
27-
2823
__attribute__((overloadable)) __clc_vec16_int8_t
2924
test___spirv_SConvert_Rchar16(__clc_vec16_int32_t args_0) {
3025
return __spirv_SConvert_Rchar16(args_0);
3126
}
3227

33-
__attribute__((overloadable)) __clc_vec16_int8_t
34-
test___spirv_SConvert_Rchar16(__clc_vec16_uint32_t args_0) {
35-
return __spirv_SConvert_Rchar16(args_0);
36-
}
37-
3828
__attribute__((overloadable)) __clc_vec16_int8_t
3929
test___spirv_SConvert_Rchar16(__clc_vec16_int64_t args_0) {
4030
return __spirv_SConvert_Rchar16(args_0);
4131
}
42-
43-
__attribute__((overloadable)) __clc_vec16_int8_t
44-
test___spirv_SConvert_Rchar16(__clc_vec16_uint64_t args_0) {
45-
return __spirv_SConvert_Rchar16(args_0);
46-
}

‎libclc/test/binding/core/SConvert_Rchar16_sat.cl

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -20,27 +20,12 @@ test___spirv_SConvert_Rchar16_sat(__clc_vec16_int16_t args_0) {
2020
return __spirv_SConvert_Rchar16_sat(args_0);
2121
}
2222

23-
__attribute__((overloadable)) __clc_vec16_int8_t
24-
test___spirv_SConvert_Rchar16_sat(__clc_vec16_uint16_t args_0) {
25-
return __spirv_SConvert_Rchar16_sat(args_0);
26-
}
27-
2823
__attribute__((overloadable)) __clc_vec16_int8_t
2924
test___spirv_SConvert_Rchar16_sat(__clc_vec16_int32_t args_0) {
3025
return __spirv_SConvert_Rchar16_sat(args_0);
3126
}
3227

33-
__attribute__((overloadable)) __clc_vec16_int8_t
34-
test___spirv_SConvert_Rchar16_sat(__clc_vec16_uint32_t args_0) {
35-
return __spirv_SConvert_Rchar16_sat(args_0);
36-
}
37-
3828
__attribute__((overloadable)) __clc_vec16_int8_t
3929
test___spirv_SConvert_Rchar16_sat(__clc_vec16_int64_t args_0) {
4030
return __spirv_SConvert_Rchar16_sat(args_0);
4131
}
42-
43-
__attribute__((overloadable)) __clc_vec16_int8_t
44-
test___spirv_SConvert_Rchar16_sat(__clc_vec16_uint64_t args_0) {
45-
return __spirv_SConvert_Rchar16_sat(args_0);
46-
}

‎libclc/test/binding/core/SConvert_Rchar2.cl

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -20,27 +20,12 @@ test___spirv_SConvert_Rchar2(__clc_vec2_int16_t args_0) {
2020
return __spirv_SConvert_Rchar2(args_0);
2121
}
2222

23-
__attribute__((overloadable)) __clc_vec2_int8_t
24-
test___spirv_SConvert_Rchar2(__clc_vec2_uint16_t args_0) {
25-
return __spirv_SConvert_Rchar2(args_0);
26-
}
27-
2823
__attribute__((overloadable)) __clc_vec2_int8_t
2924
test___spirv_SConvert_Rchar2(__clc_vec2_int32_t args_0) {
3025
return __spirv_SConvert_Rchar2(args_0);
3126
}
3227

33-
__attribute__((overloadable)) __clc_vec2_int8_t
34-
test___spirv_SConvert_Rchar2(__clc_vec2_uint32_t args_0) {
35-
return __spirv_SConvert_Rchar2(args_0);
36-
}
37-
3828
__attribute__((overloadable)) __clc_vec2_int8_t
3929
test___spirv_SConvert_Rchar2(__clc_vec2_int64_t args_0) {
4030
return __spirv_SConvert_Rchar2(args_0);
4131
}
42-
43-
__attribute__((overloadable)) __clc_vec2_int8_t
44-
test___spirv_SConvert_Rchar2(__clc_vec2_uint64_t args_0) {
45-
return __spirv_SConvert_Rchar2(args_0);
46-
}

‎libclc/test/binding/core/SConvert_Rchar2_sat.cl

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -20,27 +20,12 @@ test___spirv_SConvert_Rchar2_sat(__clc_vec2_int16_t args_0) {
2020
return __spirv_SConvert_Rchar2_sat(args_0);
2121
}
2222

23-
__attribute__((overloadable)) __clc_vec2_int8_t
24-
test___spirv_SConvert_Rchar2_sat(__clc_vec2_uint16_t args_0) {
25-
return __spirv_SConvert_Rchar2_sat(args_0);
26-
}
27-
2823
__attribute__((overloadable)) __clc_vec2_int8_t
2924
test___spirv_SConvert_Rchar2_sat(__clc_vec2_int32_t args_0) {
3025
return __spirv_SConvert_Rchar2_sat(args_0);
3126
}
3227

33-
__attribute__((overloadable)) __clc_vec2_int8_t
34-
test___spirv_SConvert_Rchar2_sat(__clc_vec2_uint32_t args_0) {
35-
return __spirv_SConvert_Rchar2_sat(args_0);
36-
}
37-
3828
__attribute__((overloadable)) __clc_vec2_int8_t
3929
test___spirv_SConvert_Rchar2_sat(__clc_vec2_int64_t args_0) {
4030
return __spirv_SConvert_Rchar2_sat(args_0);
4131
}
42-
43-
__attribute__((overloadable)) __clc_vec2_int8_t
44-
test___spirv_SConvert_Rchar2_sat(__clc_vec2_uint64_t args_0) {
45-
return __spirv_SConvert_Rchar2_sat(args_0);
46-
}

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