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[SystemZ] Custom lowering of llvm.is_fpclass
Differential Revision: https://reviews.llvm.org/D114695
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3 files changed

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‎llvm/lib/Target/SystemZ/SystemZISelLowering.cpp

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -471,6 +471,9 @@ SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM,
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setOperationAction(ISD::FREM, VT, Expand);
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setOperationAction(ISD::FPOW, VT, Expand);
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// Special treatment.
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setOperationAction(ISD::IS_FPCLASS, VT, Custom);
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// Handle constrained floating-point operations.
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setOperationAction(ISD::STRICT_FADD, VT, Legal);
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setOperationAction(ISD::STRICT_FSUB, VT, Legal);
@@ -5615,6 +5618,41 @@ SDValue SystemZTargetLowering::lowerShift(SDValue Op, SelectionDAG &DAG,
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return Op;
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}
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SDValue SystemZTargetLowering::lowerIS_FPCLASS(SDValue Op,
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SelectionDAG &DAG) const {
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SDLoc DL(Op);
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MVT ResultVT = Op.getSimpleValueType();
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SDValue Arg = Op.getOperand(0);
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auto CNode = cast<ConstantSDNode>(Op.getOperand(1));
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unsigned Check = CNode->getZExtValue();
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unsigned TDCMask = 0;
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if (Check & fcSNan)
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TDCMask |= SystemZ::TDCMASK_SNAN_PLUS | SystemZ::TDCMASK_SNAN_MINUS;
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if (Check & fcQNan)
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TDCMask |= SystemZ::TDCMASK_QNAN_PLUS | SystemZ::TDCMASK_QNAN_MINUS;
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if (Check & fcPosInf)
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TDCMask |= SystemZ::TDCMASK_INFINITY_PLUS;
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if (Check & fcNegInf)
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TDCMask |= SystemZ::TDCMASK_INFINITY_MINUS;
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if (Check & fcPosNormal)
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TDCMask |= SystemZ::TDCMASK_NORMAL_PLUS;
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if (Check & fcNegNormal)
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TDCMask |= SystemZ::TDCMASK_NORMAL_MINUS;
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if (Check & fcPosSubnormal)
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TDCMask |= SystemZ::TDCMASK_SUBNORMAL_PLUS;
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if (Check & fcNegSubnormal)
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TDCMask |= SystemZ::TDCMASK_SUBNORMAL_MINUS;
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if (Check & fcPosZero)
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TDCMask |= SystemZ::TDCMASK_ZERO_PLUS;
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if (Check & fcNegZero)
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TDCMask |= SystemZ::TDCMASK_ZERO_MINUS;
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SDValue TDCMaskV = DAG.getConstant(TDCMask, DL, MVT::i32);
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SDValue Intr = DAG.getNode(SystemZISD::TDC, DL, ResultVT, Arg, TDCMaskV);
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return getCCResult(DAG, Intr);
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}
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SDValue SystemZTargetLowering::LowerOperation(SDValue Op,
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SelectionDAG &DAG) const {
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switch (Op.getOpcode()) {
@@ -5732,6 +5770,8 @@ SDValue SystemZTargetLowering::LowerOperation(SDValue Op,
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return lowerShift(Op, DAG, SystemZISD::VSRL_BY_SCALAR);
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case ISD::SRA:
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return lowerShift(Op, DAG, SystemZISD::VSRA_BY_SCALAR);
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case ISD::IS_FPCLASS:
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return lowerIS_FPCLASS(Op, DAG);
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default:
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llvm_unreachable("Unexpected node to lower");
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}

‎llvm/lib/Target/SystemZ/SystemZISelLowering.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -680,6 +680,7 @@ class SystemZTargetLowering : public TargetLowering {
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SDValue lowerSIGN_EXTEND_VECTOR_INREG(SDValue Op, SelectionDAG &DAG) const;
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SDValue lowerZERO_EXTEND_VECTOR_INREG(SDValue Op, SelectionDAG &DAG) const;
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SDValue lowerShift(SDValue Op, SelectionDAG &DAG, unsigned ByScalar) const;
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SDValue lowerIS_FPCLASS(SDValue Op, SelectionDAG &DAG) const;
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bool canTreatAsByteVector(EVT VT) const;
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SDValue combineExtract(const SDLoc &DL, EVT ElemVT, EVT VecVT, SDValue OrigOp,

‎llvm/test/CodeGen/SystemZ/is_fpclass.ll

Lines changed: 144 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,144 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Test intrinsic 'is_fpclass'.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare i1 @llvm.is.fpclass.f32(float, i32)
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declare i1 @llvm.is.fpclass.f64(double, i32)
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declare i1 @llvm.is.fpclass.f128(fp128, i32)
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define i1 @isnan_f(float %x) {
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; CHECK-LABEL: isnan_f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tceb %f0, 15
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3) ; nan
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ret i1 %1
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}
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define i1 @isnan_d(double %x) {
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; CHECK-LABEL: isnan_d:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tcdb %f0, 15
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3) ; nan
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ret i1 %1
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}
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define i1 @isnan_x(fp128 %x) {
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; CHECK-LABEL: isnan_x:
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; CHECK: # %bb.0:
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; CHECK-NEXT: ld %f0, 0(%r2)
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; CHECK-NEXT: ld %f2, 8(%r2)
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; CHECK-NEXT: tcxb %f0, 15
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f128(fp128 %x, i32 3) ; nan
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ret i1 %1
44+
}
45+
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define i1 @isqnan_f(float %x) {
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; CHECK-LABEL: isqnan_f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tceb %f0, 12
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f32(float %x, i32 2) ; qnan
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ret i1 %1
55+
}
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57+
define i1 @issnan_f(float %x) {
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; CHECK-LABEL: issnan_f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tceb %f0, 3
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f32(float %x, i32 1) ; snan
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ret i1 %1
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}
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68+
define i1 @isinf_f(float %x) {
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; CHECK-LABEL: isinf_f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tceb %f0, 48
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; 0x204 = "inf"
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ret i1 %1
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}
78+
79+
define i1 @isposinf_f(float %x) {
80+
; CHECK-LABEL: isposinf_f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tceb %f0, 32
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f32(float %x, i32 512) ; 0x200 = "+inf"
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ret i1 %1
88+
}
89+
90+
define i1 @isneginf_f(float %x) {
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; CHECK-LABEL: isneginf_f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tceb %f0, 16
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f32(float %x, i32 4) ; "-inf"
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ret i1 %1
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}
100+
101+
define i1 @isfinite_f(float %x) {
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; CHECK-LABEL: isfinite_f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tceb %f0, 4032
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite"
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ret i1 %1
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}
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define i1 @isposfinite_f(float %x) {
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; CHECK-LABEL: isposfinite_f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tceb %f0, 2688
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f32(float %x, i32 448) ; 0x1c0 = "+finite"
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ret i1 %1
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}
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define i1 @isnegfinite_f(float %x) {
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; CHECK-LABEL: isnegfinite_f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tceb %f0, 1344
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f32(float %x, i32 56) ; 0x38 = "-finite"
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ret i1 %1
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}
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define i1 @isnotfinite_f(float %x) {
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; CHECK-LABEL: isnotfinite_f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: tceb %f0, 63
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; CHECK-NEXT: ipm %r2
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; CHECK-NEXT: srl %r2, 28
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; CHECK-NEXT: br %r14
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%1 = call i1 @llvm.is.fpclass.f32(float %x, i32 519) ; ox207 = "inf|nan"
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ret i1 %1
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}
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