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[WebAssembly] Improve codegen for v128.bitselect
Add patterns selecting ((v1 ^ v2) & c) ^ v2 and ((v1 ^ v2) & ~c) ^ v2 to v128.bitselect. Resolves #56827. Reviewed By: aheejin Differential Revision: https://reviews.llvm.org/D131131
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‎llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

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@@ -811,6 +811,20 @@ def : Pat<(vec.vt (or (and (vec.vt V128:$c), (vec.vt V128:$v1)),
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(and (vnot V128:$c), (vec.vt V128:$v2)))),
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(BITSELECT $v1, $v2, $c)>;
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// Bitselect is also equivalent to ((v1 ^ v2) & c) ^ v2
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foreach vec = IntVecs in
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def : Pat<(vec.vt (xor (and (xor (vec.vt V128:$v1), (vec.vt V128:$v2)),
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(vec.vt V128:$c)),
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(vec.vt V128:$v2))),
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(BITSELECT $v1, $v2, $c)>;
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// Same pattern with `c` negated so `a` and `b` get swapped.
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foreach vec = IntVecs in
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def : Pat<(vec.vt (xor (and (xor (vec.vt V128:$v1), (vec.vt V128:$v2)),
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(vnot (vec.vt V128:$c))),
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(vec.vt V128:$v2))),
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(BITSELECT $v2, $v1, $c)>;
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// Also implement vselect in terms of bitselect
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foreach vec = AllVecs in
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def : Pat<(vec.vt (vselect

‎llvm/test/CodeGen/WebAssembly/simd-arith.ll

Lines changed: 130 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -343,6 +343,39 @@ define <16 x i8> @bitselect_v16i8(<16 x i8> %c, <16 x i8> %v1, <16 x i8> %v2) {
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ret <16 x i8> %a
344344
}
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; CHECK-LABEL: bitselect_xor_v16i8:
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; NO-SIMD128-NOT: v128
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; SIMD128-NEXT: .functype bitselect_xor_v16i8 (v128, v128, v128) -> (v128){{$}}
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; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
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; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
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; SIMD128-FAST-NEXT: v128.xor
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; SIMD128-FAST-NEXT: v128.and
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; SIMD128-FAST-NEXT: v128.xor
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define <16 x i8> @bitselect_xor_v16i8(<16 x i8> %c, <16 x i8> %v1, <16 x i8> %v2) {
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%xor1 = xor <16 x i8> %v1, %v2
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%and = and <16 x i8> %xor1, %c
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%a = xor <16 x i8> %and, %v2
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ret <16 x i8> %a
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}
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; CHECK-LABEL: bitselect_xor_reversed_v16i8:
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; NO-SIMD128-NOT: v128
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; SIMD128-NEXT: .functype bitselect_xor_reversed_v16i8 (v128, v128, v128) -> (v128){{$}}
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; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $2, $1, $0{{$}}
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; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
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; SIMD128-FAST-NEXT: v128.xor
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; SIMD128-FAST-NEXT: v128.not
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; SIMD128-FAST-NEXT: v128.and
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; SIMD128-FAST-NEXT: v128.xor
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define <16 x i8> @bitselect_xor_reversed_v16i8(<16 x i8> %c, <16 x i8> %v1, <16 x i8> %v2) {
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%xor1 = xor <16 x i8> %v1, %v2
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%notc = xor <16 x i8> %c, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
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i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
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%and = and <16 x i8> %xor1, %notc
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%a = xor <16 x i8> %and, %v2
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ret <16 x i8> %a
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}
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346379
; ==============================================================================
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; 8 x i16
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; ==============================================================================
@@ -659,6 +692,39 @@ define <8 x i16> @bitselect_v8i16(<8 x i16> %c, <8 x i16> %v1, <8 x i16> %v2) {
659692
ret <8 x i16> %a
660693
}
661694

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; CHECK-LABEL: bitselect_xor_v8i16:
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; NO-SIMD128-NOT: v128
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; SIMD128-NEXT: .functype bitselect_xor_v8i16 (v128, v128, v128) -> (v128){{$}}
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; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
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; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
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; SIMD128-FAST-NEXT: v128.xor
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; SIMD128-FAST-NEXT: v128.and
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; SIMD128-FAST-NEXT: v128.xor
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define <8 x i16> @bitselect_xor_v8i16(<8 x i16> %c, <8 x i16> %v1, <8 x i16> %v2) {
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%xor1 = xor <8 x i16> %v1, %v2
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%and = and <8 x i16> %xor1, %c
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%a = xor <8 x i16> %and, %v2
707+
ret <8 x i16> %a
708+
}
709+
710+
; CHECK-LABEL: bitselect_xor_reversed_v8i16:
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; NO-SIMD128-NOT: v128
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; SIMD128-NEXT: .functype bitselect_xor_reversed_v8i16 (v128, v128, v128) -> (v128){{$}}
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; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $2, $1, $0{{$}}
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; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
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; SIMD128-FAST-NEXT: v128.xor
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; SIMD128-FAST-NEXT: v128.not
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; SIMD128-FAST-NEXT: v128.and
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; SIMD128-FAST-NEXT: v128.xor
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define <8 x i16> @bitselect_xor_reversed_v8i16(<8 x i16> %c, <8 x i16> %v1, <8 x i16> %v2) {
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%xor1 = xor <8 x i16> %v1, %v2
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%notc = xor <8 x i16> %c, <i16 -1, i16 -1, i16 -1, i16 -1,
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i16 -1, i16 -1, i16 -1, i16 -1>
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%and = and <8 x i16> %xor1, %notc
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%a = xor <8 x i16> %and, %v2
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ret <8 x i16> %a
726+
}
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; CHECK-LABEL: extmul_low_s_v8i16:
663729
; NO-SIMD128-NOT: i16x8
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; SIMD128-NEXT: .functype extmul_low_s_v8i16 (v128, v128) -> (v128){{$}}
@@ -998,6 +1064,38 @@ define <4 x i32> @bitselect_v4i32(<4 x i32> %c, <4 x i32> %v1, <4 x i32> %v2) {
9981064
ret <4 x i32> %a
9991065
}
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; CHECK-LABEL: bitselect_xor_v4i32:
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; NO-SIMD128-NOT: v128
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; SIMD128-NEXT: .functype bitselect_xor_v4i32 (v128, v128, v128) -> (v128){{$}}
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; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
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; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
1072+
; SIMD128-FAST-NEXT: v128.xor
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; SIMD128-FAST-NEXT: v128.and
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; SIMD128-FAST-NEXT: v128.xor
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define <4 x i32> @bitselect_xor_v4i32(<4 x i32> %c, <4 x i32> %v1, <4 x i32> %v2) {
1076+
%xor1 = xor <4 x i32> %v1, %v2
1077+
%and = and <4 x i32> %xor1, %c
1078+
%a = xor <4 x i32> %and, %v2
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ret <4 x i32> %a
1080+
}
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1082+
; CHECK-LABEL: bitselect_xor_reversed_v4i32:
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; NO-SIMD128-NOT: v128
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; SIMD128-NEXT: .functype bitselect_xor_reversed_v4i32 (v128, v128, v128) -> (v128){{$}}
1085+
; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $2, $1, $0{{$}}
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; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
1087+
; SIMD128-FAST-NEXT: v128.xor
1088+
; SIMD128-FAST-NEXT: v128.not
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; SIMD128-FAST-NEXT: v128.and
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; SIMD128-FAST-NEXT: v128.xor
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define <4 x i32> @bitselect_xor_reversed_v4i32(<4 x i32> %c, <4 x i32> %v1, <4 x i32> %v2) {
1092+
%xor1 = xor <4 x i32> %v1, %v2
1093+
%notc = xor <4 x i32> %c, <i32 -1, i32 -1, i32 -1, i32 -1>
1094+
%and = and <4 x i32> %xor1, %notc
1095+
%a = xor <4 x i32> %and, %v2
1096+
ret <4 x i32> %a
1097+
}
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10011099
; CHECK-LABEL: extmul_low_s_v4i32:
10021100
; NO-SIMD128-NOT: i32x4
10031101
; SIMD128-NEXT: .functype extmul_low_s_v4i32 (v128, v128) -> (v128){{$}}
@@ -1390,6 +1488,38 @@ define <2 x i64> @bitselect_v2i64(<2 x i64> %c, <2 x i64> %v1, <2 x i64> %v2) {
13901488
ret <2 x i64> %a
13911489
}
13921490

1491+
; CHECK-LABEL: bitselect_xor_v2i64:
1492+
; NO-SIMD128-NOT: v128
1493+
; SIMD128-NEXT: .functype bitselect_xor_v2i64 (v128, v128, v128) -> (v128){{$}}
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; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $0{{$}}
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; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
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; SIMD128-FAST-NEXT: v128.xor
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; SIMD128-FAST-NEXT: v128.and
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; SIMD128-FAST-NEXT: v128.xor
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define <2 x i64> @bitselect_xor_v2i64(<2 x i64> %c, <2 x i64> %v1, <2 x i64> %v2) {
1500+
%xor1 = xor <2 x i64> %v1, %v2
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%and = and <2 x i64> %xor1, %c
1502+
%a = xor <2 x i64> %and, %v2
1503+
ret <2 x i64> %a
1504+
}
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1506+
; CHECK-LABEL: bitselect_xor_reversed_v2i64:
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; NO-SIMD128-NOT: v128
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; SIMD128-NEXT: .functype bitselect_xor_reversed_v2i64 (v128, v128, v128) -> (v128){{$}}
1509+
; SIMD128-SLOW-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $2, $1, $0{{$}}
1510+
; SIMD128-SLOW-NEXT: return $pop[[R]]{{$}}
1511+
; SIMD128-FAST-NEXT: v128.xor
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; SIMD128-FAST-NEXT: v128.not
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; SIMD128-FAST-NEXT: v128.and
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; SIMD128-FAST-NEXT: v128.xor
1515+
define <2 x i64> @bitselect_xor_reversed_v2i64(<2 x i64> %c, <2 x i64> %v1, <2 x i64> %v2) {
1516+
%xor1 = xor <2 x i64> %v1, %v2
1517+
%notc = xor <2 x i64> %c, <i64 -1, i64 -1>
1518+
%and = and <2 x i64> %xor1, %notc
1519+
%a = xor <2 x i64> %and, %v2
1520+
ret <2 x i64> %a
1521+
}
1522+
13931523
; CHECK-LABEL: extmul_low_s_v2i64:
13941524
; NO-SIMD128-NOT: i64x2
13951525
; SIMD128-NEXT: .functype extmul_low_s_v2i64 (v128, v128) -> (v128){{$}}

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