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Revert "Reapply D124184, [DebugInfo][InstrRef] Add a size operand to DBG_PHI"
This reverts commit 5db9250. Further to the early revert, the sanitizers have found something wrong with this.
1 parent 8fbf9ac commit 987cd7c

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7 files changed

+36
-482
lines changed

7 files changed

+36
-482
lines changed

llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp

Lines changed: 32 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -722,20 +722,6 @@ MLocTracker::MLocTracker(MachineFunction &MF, const TargetInstrInfo &TII,
722722
StackSlotIdxes.insert({{Size, Offs}, Idx});
723723
}
724724

725-
// There may also be strange register class sizes (think x86 fp80s).
726-
for (const TargetRegisterClass *RC : TRI.regclasses()) {
727-
unsigned Size = TRI.getRegSizeInBits(*RC);
728-
729-
// We might see special reserved values as sizes, and classes for other
730-
// stuff the machine tries to model. If it's more than 512 bits, then it
731-
// is very unlikely to be a register than can be spilt.
732-
if (Size > 512)
733-
continue;
734-
735-
unsigned Idx = StackSlotIdxes.size();
736-
StackSlotIdxes.insert({{Size, 0}, Idx});
737-
}
738-
739725
for (auto &Idx : StackSlotIdxes)
740726
StackIdxesToPos[Idx.second] = Idx.first;
741727

@@ -1307,16 +1293,41 @@ bool InstrRefBasedLDV::transferDebugPHI(MachineInstr &MI) {
13071293
if (!SpillNo)
13081294
return EmitBadPHI();
13091295

1310-
// Any stack location DBG_PHI should have an associate bit-size.
1311-
assert(MI.getNumOperands() == 3 && "Stack DBG_PHI with no size?");
1312-
unsigned slotBitSize = MI.getOperand(2).getImm();
1296+
// Problem: what value should we extract from the stack? LLVM does not
1297+
// record what size the last store to the slot was, and it would become
1298+
// sketchy after stack slot colouring anyway. Take a look at what values
1299+
// are stored on the stack, and pick the largest one that wasn't def'd
1300+
// by a spill (i.e., the value most likely to have been def'd in a register
1301+
// and then spilt.
1302+
std::array<unsigned, 4> CandidateSizes = {64, 32, 16, 8};
1303+
Optional<ValueIDNum> Result = None;
1304+
Optional<LocIdx> SpillLoc = None;
1305+
for (unsigned CS : CandidateSizes) {
1306+
unsigned SpillID = MTracker->getLocID(*SpillNo, {CS, 0});
1307+
SpillLoc = MTracker->getSpillMLoc(SpillID);
1308+
ValueIDNum Val = MTracker->readMLoc(*SpillLoc);
1309+
// If this value was defined in it's own position, then it was probably
1310+
// an aliasing index of a small value that was spilt.
1311+
if (Val.getLoc() != SpillLoc->asU64()) {
1312+
Result = Val;
1313+
break;
1314+
}
1315+
}
13131316

1314-
unsigned SpillID = MTracker->getLocID(*SpillNo, {slotBitSize, 0});
1315-
LocIdx SpillLoc = MTracker->getSpillMLoc(SpillID);
1316-
ValueIDNum Result = MTracker->readMLoc(SpillLoc);
1317+
// If we didn't find anything, we're probably looking at a PHI, or a memory
1318+
// store folded into an instruction. FIXME: Take a guess that's it's 64
1319+
// bits. This isn't ideal, but tracking the size that the spill is
1320+
// "supposed" to be is more complex, and benefits a small number of
1321+
// locations.
1322+
if (!Result) {
1323+
unsigned SpillID = MTracker->getLocID(*SpillNo, {64, 0});
1324+
SpillLoc = MTracker->getSpillMLoc(SpillID);
1325+
Result = MTracker->readMLoc(*SpillLoc);
1326+
}
13171327

13181328
// Record this DBG_PHI for later analysis.
1319-
auto DbgPHI = DebugPHIRecord({InstrNum, MI.getParent(), Result, SpillLoc});
1329+
auto DbgPHI =
1330+
DebugPHIRecord({InstrNum, MI.getParent(), *Result, *SpillLoc});
13201331
DebugPHINumToValue.push_back(DbgPHI);
13211332
} else {
13221333
// Else: if the operand is neither a legal register or a stack slot, then

llvm/lib/CodeGen/LiveDebugVariables.cpp

Lines changed: 2 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1850,33 +1850,16 @@ void LDVImpl::emitDebugValues(VirtRegMap *VRM) {
18501850
const TargetRegisterClass *TRC = MRI.getRegClass(Reg);
18511851
unsigned SpillSize, SpillOffset;
18521852

1853-
unsigned regSizeInBits = TRI->getRegSizeInBits(*TRC);
1854-
if (SubReg)
1855-
regSizeInBits = TRI->getSubRegIdxSize(SubReg);
1856-
1857-
// Test whether this location is legal with the given subreg. If the
1858-
// subregister has a nonzero offset, drop this location, it's too complex
1859-
// to describe. (TODO: future work).
1853+
// Test whether this location is legal with the given subreg.
18601854
bool Success =
18611855
TII->getStackSlotRange(TRC, SubReg, SpillSize, SpillOffset, *MF);
18621856

1863-
if (Success && SpillOffset == 0) {
1857+
if (Success) {
18641858
auto Builder = BuildMI(*OrigMBB, OrigMBB->begin(), DebugLoc(),
18651859
TII->get(TargetOpcode::DBG_PHI));
18661860
Builder.addFrameIndex(VRM->getStackSlot(Reg));
18671861
Builder.addImm(InstNum);
1868-
// Record how large the original value is. The stack slot might be
1869-
// merged and altered during optimisation, but we will want to know how
1870-
// large the value is, at this DBG_PHI.
1871-
Builder.addImm(regSizeInBits);
1872-
}
1873-
1874-
LLVM_DEBUG(
1875-
if (SpillOffset != 0) {
1876-
dbgs() << "DBG_PHI for Vreg " << Reg << " subreg " << SubReg <<
1877-
" has nonzero offset\n";
18781862
}
1879-
);
18801863
}
18811864
// If there was no mapping for a value ID, it's optimized out. Create no
18821865
// DBG_PHI, and any variables using this value will become optimized out.

llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv2.mir

Lines changed: 0 additions & 128 deletions
This file was deleted.

llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir

Lines changed: 0 additions & 156 deletions
This file was deleted.

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