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[SYCL][ESIMD] Add support for __esimd_svm_block_ld intrinsic (#4825)
* [SYCL][ESIMD] Add support for __esimd_svm_block_ld intrinsic Signed-off-by: Sergey Dmitriev <serguei.n.dmitriev@intel.com> * Applied suggestions from code review.
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llvm/lib/SYCLLowerIR/LowerESIMD.cpp

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@@ -293,6 +293,7 @@ class ESIMDIntrinDescTable {
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{"vstore", {"vstore", {a(1), a(0)}}},
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{"svm_block_ld_unaligned", {"svm.block.ld.unaligned", {l(0)}}},
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{"svm_block_ld", {"svm.block.ld", {l(0)}}},
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{"svm_block_st", {"svm.block.st", {l(1)}}},
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{"svm_gather", {"svm.gather", {ai1(2), a(1), a(0), u(-1)}}},
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{"svm_gather4_scaled",

sycl/include/sycl/ext/intel/experimental/esimd/detail/memory_intrin.hpp

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@@ -162,6 +162,24 @@ __esimd_svm_block_ld_unaligned(uint64_t addr)
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}
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#endif // __SYCL_DEVICE_ONLY__
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// Read a block of data from the given address. Address must be 16-byte aligned.
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template <typename Ty, int N>
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__ESIMD_INTRIN __SEIEED::vector_type_t<Ty, N>
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__esimd_svm_block_ld(uint64_t addr)
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#ifdef __SYCL_DEVICE_ONLY__
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;
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#else
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{
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__SEIEED::vector_type_t<Ty, N> V;
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for (int I = 0; I < N; I++) {
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Ty *Addr = reinterpret_cast<Ty *>(addr + I * sizeof(Ty));
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V[I] = *Addr;
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}
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return V;
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}
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#endif // __SYCL_DEVICE_ONLY__
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// flat_block_write writes a block of data using one flat address
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template <typename Ty, int N, __SEIEE::CacheHint L1H = __SEIEE::CacheHint::None,
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__SEIEE::CacheHint L3H = __SEIEE::CacheHint::None>

sycl/test/esimd/intrins_trans.cpp

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@@ -214,13 +214,15 @@ test_mem_intrins(uint64_t addr, const vec<float, 8> &xf,
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// CHECK-LABEL: call void @llvm.genx.oword.st.v8f32(i32 0, i32 0, <8 x float> %{{[a-zA-Z0-9.]+}})
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}
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{
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// TODO
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// vec<int, 8> x = __esimd_svm_block_ld<int, 8>(addr);
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} {
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vec<int, 8> x = __esimd_svm_block_ld_unaligned<int, 8>(addr);
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// CHECK-LABEL: %{{[a-zA-Z0-9.]+}} = call <8 x i32> @llvm.genx.svm.block.ld.unaligned.v8i32.i64(i64 %{{[a-zA-Z0-9.]+}})
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use(x);
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}
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{
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vec<int, 8> x = __esimd_svm_block_ld<int, 8>(addr);
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// CHECK-LABEL: %{{[a-zA-Z0-9.]+}} = call <8 x i32> @llvm.genx.svm.block.ld.v8i32.i64(i64 %{{[a-zA-Z0-9.]+}})
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use(x);
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}
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{
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__esimd_svm_block_st<int, 8>(addr, get8i());
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// CHECK-LABEL: call void @llvm.genx.svm.block.st.i64.v8i32(i64 %{{[a-zA-Z0-9.]+}}, <8 x i32> %{{[a-zA-Z0-9.]+}})

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