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Reland "[COFF, ARM64] Add __break intrinsic"
https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170 Reland after fixing the test failure. The failure was due to conflict with a change (D122983) which was merged right before this patch. Reviewed By: rnk, mstorsjo Differential Revision: https://reviews.llvm.org/D124032
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10 files changed

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clang/include/clang/Basic/BuiltinsAArch64.def

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@@ -249,6 +249,8 @@ TARGET_HEADER_BUILTIN(_AddressOfReturnAddress, "v*", "nh", "intrin.h", ALL_MS_LA
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TARGET_HEADER_BUILTIN(__mulh, "SLLiSLLiSLLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "")
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TARGET_HEADER_BUILTIN(__umulh, "ULLiULLiULLi", "nh", "intrin.h", ALL_MS_LANGUAGES, "")
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TARGET_HEADER_BUILTIN(__break, "vi", "nh", "intrin.h", ALL_MS_LANGUAGES, "")
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#undef BUILTIN
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#undef LANGBUILTIN
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#undef TARGET_HEADER_BUILTIN

clang/lib/CodeGen/CGBuiltin.cpp

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@@ -9823,6 +9823,15 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
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return Builder.CreateCall(F, Metadata);
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}
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if (BuiltinID == AArch64::BI__break) {
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Expr::EvalResult Result;
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if (!E->getArg(0)->EvaluateAsInt(Result, CGM.getContext()))
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llvm_unreachable("Sema will ensure that the parameter is constant");
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llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::aarch64_break);
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return Builder.CreateCall(F, {EmitScalarExpr(E->getArg(0))});
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}
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if (BuiltinID == AArch64::BI__builtin_arm_clrex) {
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Function *F = CGM.getIntrinsic(Intrinsic::aarch64_clrex);
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return Builder.CreateCall(F);

clang/lib/Headers/intrin.h

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@@ -560,6 +560,8 @@ unsigned __int64 __cdecl _byteswap_uint64(unsigned __int64 val);
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__int64 __mulh(__int64 __a, __int64 __b);
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unsigned __int64 __umulh(unsigned __int64 __a, unsigned __int64 __b);
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void __break(int);
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#endif
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/*----------------------------------------------------------------------------*\

clang/lib/Sema/SemaChecking.cpp

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@@ -2948,6 +2948,9 @@ bool Sema::CheckAArch64BuiltinFunctionCall(const TargetInfo &TI,
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if (BuiltinID == AArch64::BI__getReg)
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return SemaBuiltinConstantArgRange(TheCall, 0, 0, 31);
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if (BuiltinID == AArch64::BI__break)
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return SemaBuiltinConstantArgRange(TheCall, 0, 0, 0xffff);
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if (CheckNeonBuiltinFunctionCall(TI, BuiltinID, TheCall))
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return true;
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clang/test/CodeGen/arm64-microsoft-intrinsics.c

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@@ -103,6 +103,13 @@ unsigned long long check_umulh(unsigned long long a, unsigned long long b) {
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// CHECK-MSVC: %[[RES:.*]] = trunc i128 %[[HIGH]] to i64
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// CHECK-LINUX: error: call to undeclared function '__umulh'
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void check__break() {
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__break(0);
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}
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// CHECK-MSVC: call void @llvm.aarch64.break(i32 0)
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// CHECK-LINUX: error: call to undeclared function '__break'
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unsigned __int64 check__getReg(void) {
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unsigned volatile __int64 reg;
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reg = __getReg(18);

clang/test/Sema/builtins-microsoft-arm64.c

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@@ -3,6 +3,12 @@
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#include <intrin.h>
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void check__break(int x) {
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__break(-1); // expected-error-re {{argument value {{.*}} is outside the valid range}}
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__break(65536); // expected-error-re {{argument value {{.*}} is outside the valid range}}
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__break(x); // expected-error {{argument to '__break' must be a constant integer}}
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}
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void check__getReg(void) {
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__getReg(-1); // expected-error-re {{argument value {{.*}} is outside the valid range}}
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__getReg(32); // expected-error-re {{argument value {{.*}} is outside the valid range}}

llvm/include/llvm/IR/IntrinsicsAArch64.td

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@@ -62,6 +62,9 @@ def int_aarch64_frint64x
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def int_aarch64_hint : DefaultAttrsIntrinsic<[], [llvm_i32_ty]>;
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def int_aarch64_break : Intrinsic<[], [llvm_i32_ty],
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[IntrNoMem, IntrHasSideEffects, IntrNoReturn, IntrCold, ImmArg<ArgIndex<0>>]>;
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//===----------------------------------------------------------------------===//
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// Data Barrier Instructions
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llvm/lib/Target/AArch64/AArch64InstrFormats.td

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@@ -4529,8 +4529,9 @@ multiclass MemTagStore<bits<2> opc1, string insn> {
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//---
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let mayLoad = 0, mayStore = 0, hasSideEffects = 1 in
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class ExceptionGeneration<bits<3> op1, bits<2> ll, string asm>
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: I<(outs), (ins timm32_0_65535:$imm), asm, "\t$imm", "", []>,
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class ExceptionGeneration<bits<3> op1, bits<2> ll, string asm,
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list<dag> pattern = []>
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: I<(outs), (ins timm32_0_65535:$imm), asm, "\t$imm", "", pattern>,
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Sched<[WriteSys]> {
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bits<16> imm;
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let Inst{31-24} = 0b11010100;

llvm/lib/Target/AArch64/AArch64InstrInfo.td

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@@ -2432,7 +2432,8 @@ def : Pat<(AArch64call texternalsym:$func), (BL texternalsym:$func)>;
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// Exception generation instructions.
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//===----------------------------------------------------------------------===//
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let isTrap = 1 in {
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def BRK : ExceptionGeneration<0b001, 0b00, "brk">;
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def BRK : ExceptionGeneration<0b001, 0b00, "brk",
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[(int_aarch64_break timm32_0_65535:$imm)]>;
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}
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def DCPS1 : ExceptionGeneration<0b101, 0b01, "dcps1">;
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def DCPS2 : ExceptionGeneration<0b101, 0b10, "dcps2">;
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@@ -0,0 +1,10 @@
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; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s
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define void @foo() nounwind {
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; CHECK-LABEL: foo
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; CHECK: brk #0x2
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tail call void @llvm.aarch64.break(i32 2)
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ret void
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}
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declare void @llvm.aarch64.break(i32 immarg) nounwind

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