[SYCL][NFC][Doc] Update sycl_ext_intel_device_info backend limitations (#16792)

SYCL_ENABLE_PCI is deprecated here
2d12863.
Remove it as requirement for device info query.
Remove statement that some device info is supported on L0 only if there
is at least one another backend that could return it. (mostly it is L0
+hip/cuda).

---------

Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova@intel.com>

Author: KseniyaTikhomirova

sycl/doc/extensions/supported/sycl_ext_intel_device_info.md

@@ -62,7 +62,7 @@ The device ID can be obtained using the standard get\_info() interface.
 
 A new device descriptor will be added which will provide the device Universal Unique ID (UUID).
 
-This new device descriptor is currently only available for devices in the Level Zero platform, and the matching aspect is only true for those devices. The DPC++ default behavior would be to expose the UUIDs of all supported devices which enables detection of total number of unique devices.
+The DPC++ default behavior would be to expose the UUIDs of all supported devices which enables detection of total number of unique devices.
 
 
 ## Version ##
@@ -100,11 +100,6 @@ The UUID can be obtained using the standard get\_info() interface.
 
 A new device descriptor will be added which will provide the PCI address in BDF format.  BDF format contains the address as: `domain:bus:device.function`.
 
-This new device descriptor is only available for devices in the Level Zero platform, and the matching aspect is only true for those devices. The DPC++ default behavior is to expose GPU devices through the Level Zero platform.
-
-**Note:** The environment variable SYCL\_ENABLE\_PCI must be set to 1 to obtain the PCI address.
-
-
 ## Version ##
 
 All versions of the extension support this query.
@@ -140,8 +135,6 @@ The PCI address can be obtained using the standard get\_info() interface.
 
 A new device descriptor will be added which will provide the physical SIMD width of an execution unit on an Intel GPU.  This data will be used to calculate the computational capabilities of the device.
 
-This new device descriptor is only available for devices in the Level Zero platform, and the matching aspect is only true for those devices. The DPC++ default behavior is to expose GPU devices through the Level Zero platform.
-
 
 ## Version ##
 
@@ -180,8 +173,6 @@ A new device descriptor will be added which will provide the number of execution
 
 This new device descriptor will provide the same information as "max\_compute\_units" does today.  We would like to have an API which is specific for Intel GPUs.
 
-This new device descriptor is only available for devices in the Level Zero platform, and the matching aspect is only true for those devices. The DPC++ default behavior is to expose GPU devices through the Level Zero platform.
-
 
 ## Version ##
 
@@ -355,8 +346,6 @@ Then the number of hardware threads per EU can be obtained using the standard ge
 
 A new device descriptor will be added which will provide the maximum memory bandwidth.  If the device is a subdevice, then the maximum bandwidth of the subdevice is returned.
 
-This new device descriptor is only available for devices in the Level Zero platform, and the matching aspect is only true for those devices. The DPC++ default behavior is to expose GPU devices through the Level Zero platform.
-
 
 ## Version ##
 
@@ -397,8 +386,6 @@ Beware that when other processes or threads are using this device when this call
 is made, the value it returns may be stale even before it is returned to the
 caller.
 
-This new device descriptor is only available for devices in the Level Zero platform, and the matching aspect is only true for those devices. The DPC++ default behavior is to expose GPU devices through the Level Zero platform.
-
 
 ## Version ##
 
@@ -435,7 +422,6 @@ Then the free device memory  can be obtained using the standard get\_info() inte
 
 A new device descriptor is added which provides the maximum clock rate of device's global memory.
 
-This new device descriptor is not available for devices in the OpenCL platform, and the matching aspect is false for those devices. The DPC++ default behavior is to expose GPU devices through the Level Zero platform.
 
 ## Version ##
 
@@ -472,7 +458,6 @@ Then the memory clock rate can be obtained using the standard get\_info() interf
 
 A new device descriptor is added which provides the maximum bus width between device and memory.
 
-This new device descriptor is not available for devices in the OpenCL platform, and the matching aspect is false for those devices. The DPC++ default behavior is to expose GPU devices through the Level Zero platform.
 
 ## Version ##