LLVM and SPIRV-LLVM-Translator pulldown (WW41)

LLVM: llvm/llvm-project@9c0314f
SPIRV-LLVM-Translator: KhronosGroup/SPIRV-LLVM-Translator@a3b372c

Author: bb-sycl

bolt/include/bolt/Core/BinaryContext.h

@@ -615,6 +615,9 @@ class BinaryContext {
   /// Number of functions with profile information
   uint64_t NumProfiledFuncs{0};
 
+  /// Number of functions with stale profile information
+  uint64_t NumStaleProfileFuncs{0};
+
   /// Number of objects in profile whose profile was ignored.
   uint64_t NumUnusedProfiledObjects{0};
 

bolt/include/bolt/Core/DebugData.h

@@ -330,8 +330,8 @@ class DebugAddrWriter {
 protected:
   class AddressForDWOCU {
   public:
-    AddressToIndexMap::iterator find(uint64_t Adddress) {
-      return AddressToIndex.find(Adddress);
+    AddressToIndexMap::iterator find(uint64_t Address) {
+      return AddressToIndex.find(Address);
     }
     AddressToIndexMap::iterator end() { return AddressToIndex.end(); }
     AddressToIndexMap::iterator begin() { return AddressToIndex.begin(); }

bolt/include/bolt/Core/MCPlusBuilder.h

@@ -1431,7 +1431,7 @@ class MCPlusBuilder {
     return false;
   }
 
-  /// Store \p Target absolute adddress to \p RegName
+  /// Store \p Target absolute address to \p RegName
   virtual InstructionListType materializeAddress(const MCSymbol *Target,
                                                  MCContext *Ctx,
                                                  MCPhysReg RegName,

bolt/include/bolt/Profile/DataAggregator.h

@@ -311,6 +311,10 @@ class DataAggregator : public DataReader {
   /// Consume the entire line
   void consumeRestOfLine();
 
+  /// True if the next token in the parsing buffer is a new line, but don't
+  /// consume it (peek only).
+  bool checkNewLine();
+
   /// Parse a single LBR entry as output by perf script -Fbrstack
   ErrorOr<LBREntry> parseLBREntry();
 

bolt/lib/Passes/BinaryPasses.cpp

@@ -417,10 +417,14 @@ void ReorderBasicBlocks::runOnFunctions(BinaryContext &BC) {
   ParallelUtilities::runOnEachFunction(
       BC, ParallelUtilities::SchedulingPolicy::SP_BB_LINEAR, WorkFun, SkipFunc,
       "ReorderBasicBlocks");
+  const size_t NumAllProfiledFunctions =
+      BC.NumProfiledFuncs + BC.NumStaleProfileFuncs;
 
   outs() << "BOLT-INFO: basic block reordering modified layout of "
-         << format("%zu (%.2lf%%) functions\n",
+         << format("%zu functions (%.2lf%% of profiled, %.2lf%% of total)\n",
                    ModifiedFuncCount.load(std::memory_order_relaxed),
+                   100.0 * ModifiedFuncCount.load(std::memory_order_relaxed) /
+                       NumAllProfiledFunctions,
                    100.0 * ModifiedFuncCount.load(std::memory_order_relaxed) /
                        BC.getBinaryFunctions().size());
 
@@ -890,7 +894,7 @@ uint64_t SimplifyConditionalTailCalls::fixTailCalls(BinaryFunction &BF) {
 
       // Annotate it, so "isCall" returns true for this jcc
       MIB->setConditionalTailCall(*CondBranch);
-      // Add info abount the conditional tail call frequency, otherwise this
+      // Add info about the conditional tail call frequency, otherwise this
       // info will be lost when we delete the associated BranchInfo entry
       auto &CTCAnnotation =
           MIB->getOrCreateAnnotationAs<uint64_t>(*CondBranch, "CTCTakenCount");
@@ -1383,6 +1387,7 @@ void PrintProgramStats::runOnFunctions(BinaryContext &BC) {
     }
   }
   BC.NumProfiledFuncs = ProfiledFunctions.size();
+  BC.NumStaleProfileFuncs = NumStaleProfileFunctions;
 
   const size_t NumAllProfiledFunctions =
       ProfiledFunctions.size() + NumStaleProfileFunctions;

bolt/lib/Passes/IndirectCallPromotion.cpp

@@ -416,15 +416,15 @@ IndirectCallPromotion::maybeGetHotJumpTableTargets(BinaryBasicBlock &BB,
 
   ++TotalIndexBasedCandidates;
 
-  auto ErrorOrMemAccesssProfile =
+  auto ErrorOrMemAccessProfile =
       BC.MIB->tryGetAnnotationAs<MemoryAccessProfile>(*MemLocInstr,
                                                       "MemoryAccessProfile");
-  if (!ErrorOrMemAccesssProfile) {
+  if (!ErrorOrMemAccessProfile) {
     DEBUG_VERBOSE(1, dbgs()
                          << "BOLT-INFO: ICP no memory profiling data found\n");
     return JumpTableInfoType();
   }
-  MemoryAccessProfile &MemAccessProfile = ErrorOrMemAccesssProfile.get();
+  MemoryAccessProfile &MemAccessProfile = ErrorOrMemAccessProfile.get();
 
   uint64_t ArrayStart;
   if (DispExpr) {
@@ -670,15 +670,15 @@ IndirectCallPromotion::MethodInfoType IndirectCallPromotion::maybeGetVtableSyms(
   });
 
   // Try to get value profiling data for the method load instruction.
-  auto ErrorOrMemAccesssProfile =
+  auto ErrorOrMemAccessProfile =
       BC.MIB->tryGetAnnotationAs<MemoryAccessProfile>(*MethodFetchInsns.back(),
                                                       "MemoryAccessProfile");
-  if (!ErrorOrMemAccesssProfile) {
+  if (!ErrorOrMemAccessProfile) {
     DEBUG_VERBOSE(1, dbgs()
                          << "BOLT-INFO: ICP no memory profiling data found\n");
     return MethodInfoType();
   }
-  MemoryAccessProfile &MemAccessProfile = ErrorOrMemAccesssProfile.get();
+  MemoryAccessProfile &MemAccessProfile = ErrorOrMemAccessProfile.get();
 
   // Find the vtable that each method belongs to.
   std::map<const MCSymbol *, uint64_t> MethodToVtable;

bolt/lib/Passes/ReorderData.cpp

@@ -182,14 +182,14 @@ void ReorderData::assignMemData(BinaryContext &BC) {
 
     for (const BinaryBasicBlock &BB : BF) {
       for (const MCInst &Inst : BB) {
-        auto ErrorOrMemAccesssProfile =
+        auto ErrorOrMemAccessProfile =
             BC.MIB->tryGetAnnotationAs<MemoryAccessProfile>(
                 Inst, "MemoryAccessProfile");
-        if (!ErrorOrMemAccesssProfile)
+        if (!ErrorOrMemAccessProfile)
           continue;
 
         const MemoryAccessProfile &MemAccessProfile =
-            ErrorOrMemAccesssProfile.get();
+            ErrorOrMemAccessProfile.get();
         for (const AddressAccess &AccessInfo :
              MemAccessProfile.AddressAccessInfo) {
           if (BinaryData *BD = AccessInfo.MemoryObject) {
@@ -238,14 +238,14 @@ ReorderData::sortedByFunc(BinaryContext &BC, const BinarySection &Section,
         continue;
 
       for (const MCInst &Inst : BB) {
-        auto ErrorOrMemAccesssProfile =
+        auto ErrorOrMemAccessProfile =
             BC.MIB->tryGetAnnotationAs<MemoryAccessProfile>(
                 Inst, "MemoryAccessProfile");
-        if (!ErrorOrMemAccesssProfile)
+        if (!ErrorOrMemAccessProfile)
           continue;
 
         const MemoryAccessProfile &MemAccessProfile =
-            ErrorOrMemAccesssProfile.get();
+            ErrorOrMemAccessProfile.get();
         for (const AddressAccess &AccessInfo :
              MemAccessProfile.AddressAccessInfo) {
           if (AccessInfo.MemoryObject)

bolt/lib/Passes/RetpolineInsertion.cpp

@@ -44,19 +44,17 @@ RetpolineLfence("retpoline-lfence",
   cl::Hidden,
   cl::cat(BoltCategory));
 
-cl::opt<RetpolineInsertion::AvailabilityOptions>
-R11Availability("r11-availability",
-  cl::desc("determine the availablity of r11 before indirect branches"),
-  cl::init(RetpolineInsertion::AvailabilityOptions::NEVER),
-  cl::values(
-    clEnumValN(RetpolineInsertion::AvailabilityOptions::NEVER,
-      "never", "r11 not available"),
-    clEnumValN(RetpolineInsertion::AvailabilityOptions::ALWAYS,
-      "always", "r11 avaialable before calls and jumps"),
-    clEnumValN(RetpolineInsertion::AvailabilityOptions::ABI,
-      "abi", "r11 avaialable before calls but not before jumps")),
-  cl::ZeroOrMore,
-  cl::cat(BoltCategory));
+cl::opt<RetpolineInsertion::AvailabilityOptions> R11Availability(
+    "r11-availability",
+    cl::desc("determine the availability of r11 before indirect branches"),
+    cl::init(RetpolineInsertion::AvailabilityOptions::NEVER),
+    cl::values(clEnumValN(RetpolineInsertion::AvailabilityOptions::NEVER,
+                          "never", "r11 not available"),
+               clEnumValN(RetpolineInsertion::AvailabilityOptions::ALWAYS,
+                          "always", "r11 avaialable before calls and jumps"),
+               clEnumValN(RetpolineInsertion::AvailabilityOptions::ABI, "abi",
+                          "r11 avaialable before calls but not before jumps")),
+    cl::ZeroOrMore, cl::cat(BoltCategory));
 
 } // namespace opts
 

bolt/lib/Profile/DataAggregator.cpp

@@ -1056,6 +1056,10 @@ void DataAggregator::consumeRestOfLine() {
   Line += 1;
 }
 
+bool DataAggregator::checkNewLine() {
+  return ParsingBuf[0] == '\n';
+}
+
 ErrorOr<DataAggregator::PerfBranchSample> DataAggregator::parseBranchSample() {
   PerfBranchSample Res;
 
@@ -2147,7 +2151,8 @@ DataAggregator::parseNameBuildIDPair() {
 
   // If one of the strings is missing, don't issue a parsing error, but still
   // do not return a value.
-  if (ParsingBuf[0] == '\n')
+  consumeAllRemainingFS();
+  if (checkNewLine())
     return NoneType();
 
   ErrorOr<StringRef> NameStr = parseString(FieldSeparator, true);

bolt/lib/Rewrite/RewriteInstance.cpp

@@ -1429,10 +1429,17 @@ void RewriteInstance::adjustFunctionBoundaries() {
         Function.hasRestoredNameRegex(".*\\.cold(\\.[0-9]+)?");
     if (FragName) {
       static bool PrintedWarning = false;
-      if (BC->HasRelocations && !PrintedWarning) {
-        errs() << "BOLT-WARNING: split function detected on input : "
-               << *FragName << ". The support is limited in relocation mode.\n";
+      if (!PrintedWarning) {
         PrintedWarning = true;
+        errs() << "BOLT-WARNING: split function detected on input : "
+               << *FragName;
+        if (BC->HasRelocations)
+          errs() << ". The support is limited in relocation mode";
+        if (opts::Lite) {
+          opts::Lite = false;
+          errs() << "\nBOLT-WARNING: disabling lite mode (-lite) when split "
+                 << "functions are present\n";
+        }
       }
       Function.IsFragment = true;
     }