Merge from '"sycl"' to '"sycl-web"' (16 commits)

  CONFLICT (content): Merge conflict in clang/test/CodeGenSYCL/functionptr-addrspace.cpp

Author: ivankelarev

buildbot/configure.py

@@ -32,7 +32,7 @@ def do_configure(args):
     libclc_targets_to_build = ''
     libclc_gen_remangled_variants = 'OFF'
     sycl_build_pi_cuda = 'OFF'
-    sycl_build_pi_esimd_emulator = 'OFF'
+    sycl_build_pi_esimd_emulator = 'ON'
     sycl_build_pi_hip = 'OFF'
     sycl_build_pi_hip_platform = 'AMD'
     sycl_clang_extra_flags = ''
@@ -50,8 +50,8 @@ def do_configure(args):
     if args.arm:
         llvm_targets_to_build = 'ARM;AArch64'
 
-    if args.enable_esimd_cpu_emulation:
-        sycl_build_pi_esimd_emulator = 'ON'
+    if args.disable_esimd_emulator:
+        sycl_build_pi_esimd_emulator = 'OFF'
 
     if args.cuda or args.hip:
         llvm_enable_projects += ';libclc'
@@ -213,7 +213,7 @@ def main():
     parser.add_argument("--hip-platform", type=str, choices=['AMD', 'NVIDIA'], default='AMD', help="choose hardware platform for HIP backend")
     parser.add_argument("--hip-amd-arch", type=str, help="Sets AMD gpu architecture for llvm lit tests, this is only needed for the HIP backend and AMD platform")
     parser.add_argument("--arm", action='store_true', help="build ARM support rather than x86")
-    parser.add_argument("--enable-esimd-cpu-emulation", action='store_true', help="build with ESIMD_CPU emulation support")
+    parser.add_argument("--disable-esimd-emulator", action='store_true', help="exclude ESIMD_EMULATOR support")
     parser.add_argument("--no-assertions", action='store_true', help="build without assertions")
     parser.add_argument("--docs", action='store_true', help="build Doxygen documentation")
     parser.add_argument("--no-werror", action='store_true', help="Don't treat warnings as errors")

buildbot/dependency.conf

@@ -25,6 +25,7 @@ ocl_fpga_emu_ver=2021.13.11.0.23
 ocl_fpga_emu_ver_win=2021.13.11.0.23
 fpga_ver=20211014_000004
 fpga_ver_win=20211014_000004
+# https://downloadmirror.intel.com/691496/igfx_win_101.1191.zip
 ocloc_ver_win=101.1191
 
 [DRIVER VERSIONS]

clang/include/clang/Basic/Attr.td

@@ -1280,15 +1280,17 @@ def SYCLRegisterNum : InheritableAttr {
   let Documentation = [SYCLRegisterNumDocs];
 }
 
-// Used by FE to mark ESIMD kernel pointer parameters which correspond to the
+// Used by FE to mark SYCL kernel pointer parameters which correspond to the
 // original lambda's captured accessors. FE turns the attribute to some metadata
-// required by the ESIMD Back-End.
-// Not supposed to be used directly in the source - SYCL device compiler FE
-// automatically adds it for ESIMD kernels, hence undocumented.
-def SYCLSimdAccessorPtr : InheritableAttr {
-  // No spelling, as this attribute can't be created in the source code.
+// required by the device back-end.
+// This attribute does not require custom semantic handling 
+// hence we set the SemaHandler field to 0.
+// The attribute is not for public consumption, and is an implicitly-created attribute
+// that has no visible spelling, hence undocumented.
+def SYCLAccessorPtr : Attr {
+  // This attribute has no spellings as it is only ever created implicitly.
   let Spellings = [];
-  let Subjects = SubjectList<[ParmVar]>;
+  let SemaHandler = 0;
   let Documentation = [Undocumented];
 }
 

clang/include/clang/Basic/BuiltinsNVPTX.def

@@ -2054,6 +2054,92 @@ TARGET_BUILTIN(__nvvm_atom_acq_rel_cas_shared_ll, "LLiLLiD*LLiLLi", "n", SM_70)
 TARGET_BUILTIN(__nvvm_atom_acq_rel_cta_cas_shared_ll, "LLiLLiD*LLiLLi", "n", SM_70)
 TARGET_BUILTIN(__nvvm_atom_acq_rel_sys_cas_shared_ll, "LLiLLiD*LLiLLi", "n", SM_70)
 
+#pragma push_macro("LD_VOLATILE_BUILTIN_TYPES")
+#define LD_VOLATILE_BUILTIN_TYPES(ADDR_SPACE) \
+BUILTIN(__nvvm_volatile_ld##ADDR_SPACE##_i, "iiD*", "n") \
+BUILTIN(__nvvm_volatile_ld##ADDR_SPACE##_l, "LiLiD*", "n") \
+BUILTIN(__nvvm_volatile_ld##ADDR_SPACE##_ll, "LLiLLiD*", "n") \
+BUILTIN(__nvvm_volatile_ld##ADDR_SPACE##_f, "ffD*", "n") \
+BUILTIN(__nvvm_volatile_ld##ADDR_SPACE##_d, "ddD*", "n")
+
+#pragma push_macro("LD_BUILTIN_TYPES")
+#define LD_BUILTIN_TYPES(ORDER, SCOPE, ADDR_SPACE) \
+TARGET_BUILTIN(__nvvm##ORDER##SCOPE##_ld##ADDR_SPACE##_i, "iiD*", "n", SM_70) \
+TARGET_BUILTIN(__nvvm##ORDER##SCOPE##_ld##ADDR_SPACE##_l, "LiLiD*", "n", SM_70) \
+TARGET_BUILTIN(__nvvm##ORDER##SCOPE##_ld##ADDR_SPACE##_ll, "LLiLLiD*", "n", SM_70) \
+TARGET_BUILTIN(__nvvm##ORDER##SCOPE##_ld##ADDR_SPACE##_f, "ffD*", "n", SM_70) \
+TARGET_BUILTIN(__nvvm##ORDER##SCOPE##_ld##ADDR_SPACE##_d, "ddD*", "n", SM_70)
+
+#pragma push_macro("LD_BUILTIN_AS_TYPES")
+#define LD_BUILTIN_AS_TYPES(ORDER, SCOPE) \
+LD_BUILTIN_TYPES(ORDER, SCOPE, _gen) \
+LD_BUILTIN_TYPES(ORDER, SCOPE, _global) \
+LD_BUILTIN_TYPES(ORDER, SCOPE, _shared)
+
+#pragma push_macro("LD_BUILTIN_SCOPES_AS_TYPES")
+#define LD_BUILTIN_SCOPES_AS_TYPES(ORDER) \
+LD_BUILTIN_AS_TYPES(ORDER, ) \
+LD_BUILTIN_AS_TYPES(ORDER, _cta) \
+LD_BUILTIN_AS_TYPES(ORDER, _sys)
+
+LD_BUILTIN_SCOPES_AS_TYPES()
+LD_BUILTIN_SCOPES_AS_TYPES(_acquire)
+LD_VOLATILE_BUILTIN_TYPES(_gen)
+LD_VOLATILE_BUILTIN_TYPES(_global)
+LD_VOLATILE_BUILTIN_TYPES(_shared)
+
+#undef LD_VOLATILE_BUILTIN_TYPES
+#pragma pop_macro("LD_VOLATILE_BUILTIN_TYPES")
+#undef LD_BUILTIN_TYPES
+#pragma pop_macro("LD_BUILTIN_TYPES")
+#undef LD_BUILTIN_AS_TYPES
+#pragma pop_macro("LD_BUILTIN_AS_TYPES")
+#undef LD_BUILTIN_SCOPES_AS_TYPES
+#pragma pop_macro("LD_BUILTIN_SCOPES_AS_TYPES")
+
+#pragma push_macro("ST_VOLATILE_BUILTIN_TYPES")
+#define ST_VOLATILE_BUILTIN_TYPES(ADDR_SPACE) \
+BUILTIN(__nvvm_volatile_st##ADDR_SPACE##_i, "viD*i", "n") \
+BUILTIN(__nvvm_volatile_st##ADDR_SPACE##_l, "vLiD*Li", "n") \
+BUILTIN(__nvvm_volatile_st##ADDR_SPACE##_ll, "vLLiD*LLi", "n") \
+BUILTIN(__nvvm_volatile_st##ADDR_SPACE##_f, "vfD*f", "n") \
+BUILTIN(__nvvm_volatile_st##ADDR_SPACE##_d, "vdD*d", "n")
+
+#pragma push_macro("ST_BUILTIN_TYPES")
+#define ST_BUILTIN_TYPES(ORDER, SCOPE, ADDR_SPACE) \
+TARGET_BUILTIN(__nvvm##ORDER##SCOPE##_st##ADDR_SPACE##_i, "viD*i", "n", SM_70) \
+TARGET_BUILTIN(__nvvm##ORDER##SCOPE##_st##ADDR_SPACE##_l, "vLiD*Li", "n", SM_70) \
+TARGET_BUILTIN(__nvvm##ORDER##SCOPE##_st##ADDR_SPACE##_ll, "vLLiD*LLi", "n", SM_70) \
+TARGET_BUILTIN(__nvvm##ORDER##SCOPE##_st##ADDR_SPACE##_f, "vfD*f", "n", SM_70) \
+TARGET_BUILTIN(__nvvm##ORDER##SCOPE##_st##ADDR_SPACE##_d, "vdD*d", "n", SM_70)
+
+#pragma push_macro("ST_BUILTIN_AS_TYPES")
+#define ST_BUILTIN_AS_TYPES(ORDER, SCOPE) \
+ST_BUILTIN_TYPES(ORDER, SCOPE, _gen) \
+ST_BUILTIN_TYPES(ORDER, SCOPE, _global) \
+ST_BUILTIN_TYPES(ORDER, SCOPE, _shared)
+
+#pragma push_macro("ST_BUILTIN_SCOPES_AS_TYPES")
+#define ST_BUILTIN_SCOPES_AS_TYPES(ORDER) \
+ST_BUILTIN_AS_TYPES(ORDER, ) \
+ST_BUILTIN_AS_TYPES(ORDER, _cta) \
+ST_BUILTIN_AS_TYPES(ORDER, _sys)
+
+ST_BUILTIN_SCOPES_AS_TYPES()
+ST_BUILTIN_SCOPES_AS_TYPES(_release)
+ST_VOLATILE_BUILTIN_TYPES(_gen)
+ST_VOLATILE_BUILTIN_TYPES(_global)
+ST_VOLATILE_BUILTIN_TYPES(_shared)
+
+#undef ST_VOLATILE_BUILTIN_TYPES
+#pragma pop_macro("ST_VOLATILE_BUILTIN_TYPES")
+#undef ST_BUILTIN_TYPES
+#pragma pop_macro("ST_BUILTIN_TYPES")
+#undef ST_BUILTIN_AS_TYPES
+#pragma pop_macro("ST_BUILTIN_AS_TYPES")
+#undef ST_BUILTIN_SCOPES_AS_TYPES
+#pragma pop_macro("ST_BUILTIN_SCOPES_AS_TYPES")
+
 // Compiler Error Warn
 BUILTIN(__nvvm_compiler_error, "vcC*4", "n")
 BUILTIN(__nvvm_compiler_warn, "vcC*4", "n")

clang/include/clang/Basic/DiagnosticSemaKinds.td

@@ -11627,6 +11627,8 @@ def err_sycl_expected_finalize_method : Error<
 def ext_sycl_2020_attr_spelling : ExtWarn<
   "use of attribute %0 is a SYCL 2020 extension">,
   InGroup<Sycl2017Compat>;
+def err_sycl_esimd_not_supported_for_type : Error<
+  "type %0 is not supported in ESIMD context">;
 def err_sycl_taking_address_of_wrong_function : Error<
   "taking address of a function not marked with "
   "'intel::device_indirectly_callable' attribute is not allowed in SYCL device "

clang/include/clang/Basic/Version.h

@@ -15,7 +15,9 @@
 #ifndef LLVM_CLANG_BASIC_VERSION_H
 #define LLVM_CLANG_BASIC_VERSION_H
 
+#include "clang/Basic/LangOptions.h"
 #include "clang/Basic/Version.inc"
+#include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringRef.h"
 
 namespace clang {
@@ -56,6 +58,11 @@ namespace clang {
   /// for use in the CPP __VERSION__ macro, which includes the clang version
   /// number, the repository version, and the vendor tag.
   std::string getClangFullCPPVersion();
+
+  /// Retrieves a string representing the SYCL standard version for use in
+  /// the CL_SYCL_LANGUAGE_VERSION and SYCL_LANGUAGE_VERSION macros.
+  llvm::SmallVector<std::pair<llvm::StringRef, llvm::StringRef>, 2>
+  getSYCLVersionMacros(const LangOptions &LangOpts);
 }
 
 #endif // LLVM_CLANG_BASIC_VERSION_H

clang/include/clang/Driver/Action.h

@@ -625,6 +625,7 @@ class OffloadUnbundlingJobAction final : public JobAction {
 public:
   // Offloading unbundling doesn't change the type of output.
   OffloadUnbundlingJobAction(Action *Input);
+  OffloadUnbundlingJobAction(Action *Input, types::ID Type);
   OffloadUnbundlingJobAction(ActionList &Inputs, types::ID Type);
 
   /// Register information about a dependent action.

clang/lib/Basic/Version.cpp

@@ -123,4 +123,13 @@ std::string getClangFullCPPVersion() {
   return buf;
 }
 
+llvm::SmallVector<std::pair<llvm::StringRef, llvm::StringRef>, 2>
+getSYCLVersionMacros(const LangOptions &LangOpts) {
+  if (LangOpts.getSYCLVersion() == LangOptions::SYCL_2017)
+    return {{"CL_SYCL_LANGUAGE_VERSION", "121"},
+            {"SYCL_LANGUAGE_VERSION", "201707"}};
+  if (LangOpts.getSYCLVersion() == LangOptions::SYCL_2020)
+    return {{"SYCL_LANGUAGE_VERSION", "202001"}};
+  llvm_unreachable("SYCL standard should be set");
+}
 } // end namespace clang

clang/lib/CodeGen/BackendUtil.cpp

@@ -1045,9 +1045,8 @@ void EmitAssemblyHelper::EmitAssemblyWithLegacyPassManager(
   // -fsycl-instrument-device-code option was passed. This option can be
   // used only with spir triple.
   if (CodeGenOpts.SPIRITTAnnotations) {
-    if (!llvm::Triple(TheModule->getTargetTriple()).isSPIR())
-      llvm::report_fatal_error(
-          "ITT annotations can only by added to a module with spir target");
+    assert(llvm::Triple(TheModule->getTargetTriple()).isSPIR() &&
+           "ITT annotations can only by added to a module with spir target");
     PerModulePasses.add(createSPIRITTAnnotationsLegacyPass());
   }
 
@@ -1481,6 +1480,17 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
     MPM.addPass(SYCLMutatePrintfAddrspacePass());
   }
 
+  // Allocate static local memory in SYCL kernel scope for each allocation
+  // call. It should be called after inlining pass.
+  if (LangOpts.SYCLIsDevice) {
+    // Group local memory pass depends on inlining. Turn it on even in case if
+    // all llvm passes or SYCL early optimizations are disabled.
+    // FIXME: Remove this workaround when dependency on inlining is eliminated.
+    if (CodeGenOpts.DisableLLVMPasses)
+      MPM.addPass(AlwaysInlinerPass(false));
+    MPM.addPass(SYCLLowerWGLocalMemoryPass());
+  }
+
   // Add a verifier pass if requested. We don't have to do this if the action
   // requires code generation because there will already be a verifier pass in
   // the code-generation pipeline.

clang/lib/CodeGen/CGBuiltin.cpp

@@ -17503,6 +17503,21 @@ CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) {
                                        Ptr->getType()}),
         {Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())});
   };
+  auto MakeScopedLd = [&](unsigned IntrinsicID) {
+    Value *Ptr = EmitScalarExpr(E->getArg(0));
+    return Builder.CreateCall(
+        CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(),
+                                       Ptr->getType()}),
+        {Ptr});
+  };
+  auto MakeScopedSt = [&](unsigned IntrinsicID) {
+    Value *Ptr = EmitScalarExpr(E->getArg(0));
+    return Builder.CreateCall(
+        CGM.getIntrinsic(
+            IntrinsicID,
+            {Ptr->getType(), Ptr->getType()->getPointerElementType()}),
+        {Ptr, EmitScalarExpr(E->getArg(1))});
+  };
   auto MakeScopedAtomic = [&](unsigned IntrinsicID) {
     Value *Ptr = EmitScalarExpr(E->getArg(0));
     return Builder.CreateCall(
@@ -17518,6 +17533,85 @@ CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) {
         {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))});
   };
   switch (BuiltinID) {
+
+#define LD_VOLATILE_CASES(ADDR_SPACE)                                          \
+  case NVPTX::BI__nvvm_volatile_ld##ADDR_SPACE##_i:                            \
+  case NVPTX::BI__nvvm_volatile_ld##ADDR_SPACE##_l:                            \
+  case NVPTX::BI__nvvm_volatile_ld##ADDR_SPACE##_ll:                           \
+    return MakeScopedLd(Intrinsic::nvvm_ld##ADDR_SPACE##_i_volatile);          \
+  case NVPTX::BI__nvvm_volatile_ld##ADDR_SPACE##_f:                            \
+  case NVPTX::BI__nvvm_volatile_ld##ADDR_SPACE##_d:                            \
+    return MakeScopedLd(Intrinsic::nvvm_ld##ADDR_SPACE##_f_volatile);
+
+#define LD_CASES(ORDER, SCOPE, ADDR_SPACE)                                     \
+  case NVPTX::BI__nvvm##ORDER##SCOPE##_ld##ADDR_SPACE##_i:                     \
+  case NVPTX::BI__nvvm##ORDER##SCOPE##_ld##ADDR_SPACE##_l:                     \
+  case NVPTX::BI__nvvm##ORDER##SCOPE##_ld##ADDR_SPACE##_ll:                    \
+    return MakeScopedLd(Intrinsic::nvvm_ld##ADDR_SPACE##_i##ORDER##SCOPE);     \
+  case NVPTX::BI__nvvm##ORDER##SCOPE##_ld##ADDR_SPACE##_f:                     \
+  case NVPTX::BI__nvvm##ORDER##SCOPE##_ld##ADDR_SPACE##_d:                     \
+    return MakeScopedLd(Intrinsic::nvvm_ld##ADDR_SPACE##_f##ORDER##SCOPE);
+
+#define LD_CASES_AS(ORDER, SCOPE)                                              \
+  LD_CASES(ORDER, SCOPE, _gen)                                                 \
+  LD_CASES(ORDER, SCOPE, _global)                                              \
+  LD_CASES(ORDER, SCOPE, _shared)
+
+#define LD_CASES_AS_SCOPES(ORDER)                                              \
+  LD_CASES_AS(ORDER, )                                                         \
+  LD_CASES_AS(ORDER, _cta)                                                     \
+  LD_CASES_AS(ORDER, _sys)
+
+    LD_CASES_AS_SCOPES()
+    LD_CASES_AS_SCOPES(_acquire)
+    LD_VOLATILE_CASES(_gen)
+    LD_VOLATILE_CASES(_global)
+    LD_VOLATILE_CASES(_shared)
+
+#undef LD_VOLATILE_CASES
+#undef LD_CASES
+#undef LD_CASES_AS
+#undef LD_CASES_AS_SCOPES
+
+#define ST_VOLATILE_CASES(ADDR_SPACE)                                          \
+  case NVPTX::BI__nvvm_volatile_st##ADDR_SPACE##_i:                            \
+  case NVPTX::BI__nvvm_volatile_st##ADDR_SPACE##_l:                            \
+  case NVPTX::BI__nvvm_volatile_st##ADDR_SPACE##_ll:                           \
+    return MakeScopedSt(Intrinsic::nvvm_st##ADDR_SPACE##_i_volatile);          \
+  case NVPTX::BI__nvvm_volatile_st##ADDR_SPACE##_f:                            \
+  case NVPTX::BI__nvvm_volatile_st##ADDR_SPACE##_d:                            \
+    return MakeScopedSt(Intrinsic::nvvm_st##ADDR_SPACE##_f_volatile);
+
+#define ST_CASES(ORDER, SCOPE, ADDR_SPACE)                                     \
+  case NVPTX::BI__nvvm##ORDER##SCOPE##_st##ADDR_SPACE##_i:                     \
+  case NVPTX::BI__nvvm##ORDER##SCOPE##_st##ADDR_SPACE##_l:                     \
+  case NVPTX::BI__nvvm##ORDER##SCOPE##_st##ADDR_SPACE##_ll:                    \
+    return MakeScopedSt(Intrinsic::nvvm_st##ADDR_SPACE##_i##ORDER##SCOPE);     \
+  case NVPTX::BI__nvvm##ORDER##SCOPE##_st##ADDR_SPACE##_f:                     \
+  case NVPTX::BI__nvvm##ORDER##SCOPE##_st##ADDR_SPACE##_d:                     \
+    return MakeScopedSt(Intrinsic::nvvm_st##ADDR_SPACE##_f##ORDER##SCOPE);
+
+#define ST_CASES_AS(ORDER, SCOPE)                                              \
+  ST_CASES(ORDER, SCOPE, _gen)                                                 \
+  ST_CASES(ORDER, SCOPE, _global)                                              \
+  ST_CASES(ORDER, SCOPE, _shared)
+
+#define ST_CASES_AS_SCOPES(ORDER)                                              \
+  ST_CASES_AS(ORDER, )                                                         \
+  ST_CASES_AS(ORDER, _cta)                                                     \
+  ST_CASES_AS(ORDER, _sys)
+
+    ST_CASES_AS_SCOPES()
+    ST_CASES_AS_SCOPES(_release)
+    ST_VOLATILE_CASES(_gen)
+    ST_VOLATILE_CASES(_global)
+    ST_VOLATILE_CASES(_shared)
+
+#undef ST_VOLATILE_CASES
+#undef ST_CASES
+#undef ST_CASES_AS
+#undef ST_CASES_AS_SCOPES
+
   case NVPTX::BI__nvvm_atom_add_gen_i:
   case NVPTX::BI__nvvm_atom_add_gen_l:
   case NVPTX::BI__nvvm_atom_add_gen_ll: