[PowerPC] Precommit test of building vector via load and zeros. NFC.

Author: Kai Luo

llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll

@@ -0,0 +1,50 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mcpu=pwr7 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mcpu=pwr8 < %s | FileCheck --check-prefix=PWR8 %s
+
+define  <2 x i64> @build_v2i64(ptr nocapture noundef readonly %p, <2 x i64> noundef %a) {
+; CHECK-LABEL: build_v2i64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lwz 3, 0(3)
+; CHECK-NEXT:    li 4, 0
+; CHECK-NEXT:    std 4, -8(1)
+; CHECK-NEXT:    std 3, -16(1)
+; CHECK-NEXT:    addi 3, 1, -16
+; CHECK-NEXT:    lxvd2x 34, 0, 3
+; CHECK-NEXT:    blr
+;
+; PWR8-LABEL: build_v2i64:
+; PWR8:       # %bb.0: # %entry
+; PWR8-NEXT:    lwz 3, 0(3)
+; PWR8-NEXT:    li 4, 0
+; PWR8-NEXT:    mtfprd 0, 4
+; PWR8-NEXT:    mtfprd 1, 3
+; PWR8-NEXT:    xxmrghd 34, 1, 0
+; PWR8-NEXT:    blr
+entry:
+  %0 = load i32, ptr %p, align 4
+  %conv = zext i32 %0 to i64
+  %vecinit1 = insertelement <2 x i64> <i64 poison, i64 0>, i64 %conv, i64 0
+  ret <2 x i64> %vecinit1
+}
+
+define <2 x double> @build_v2f64(ptr nocapture noundef readonly %p, <2 x double> noundef %a) {
+; CHECK-LABEL: build_v2f64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lfs 0, 0(3)
+; CHECK-NEXT:    xxlxor 1, 1, 1
+; CHECK-NEXT:    xxmrghd 34, 0, 1
+; CHECK-NEXT:    blr
+;
+; PWR8-LABEL: build_v2f64:
+; PWR8:       # %bb.0: # %entry
+; PWR8-NEXT:    lfs 0, 0(3)
+; PWR8-NEXT:    xxlxor 1, 1, 1
+; PWR8-NEXT:    xxmrghd 34, 0, 1
+; PWR8-NEXT:    blr
+entry:
+  %0 = load float, ptr %p, align 4
+  %conv = fpext float %0 to double
+  %vecinit1 = insertelement <2 x double> <double poison, double 0.000000e+00>, double %conv, i64 0
+  ret <2 x double> %vecinit1
+}