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Merge tag 'amd-pstate-v6.15-2025-03-06' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux
Merge amd-pstate updates for 6.15 (3/6/25) from Mario Limonciello: "A lot of code optimization to avoid cases where call paths will end up calling the same writes multiple times and needlessly caching variables. To accomplish this some of the writes are now made into an atomically written "perf" variable. Locking has been overhauled to ensure it only applies to the necessary functions. Tracing has been adjusted to ensure trace events only are used right before writing out to the hardware." NOTE: This is a redo of amd-pstate-v6.15-2025-03-03 with a fixed Fixes tag. * tag 'amd-pstate-v6.15-2025-03-06' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: (29 commits) cpufreq/amd-pstate: Drop actions in amd_pstate_epp_cpu_offline() cpufreq/amd-pstate: Stop caching EPP cpufreq/amd-pstate: Rework CPPC enabling cpufreq/amd-pstate: Drop debug statements for policy setting cpufreq/amd-pstate: Update cppc_req_cached for shared mem EPP writes cpufreq/amd-pstate: Move all EPP tracing into *_update_perf and *_set_epp functions cpufreq/amd-pstate: Cache CPPC request in shared mem case too cpufreq/amd-pstate: Replace all AMD_CPPC_* macros with masks cpufreq/amd-pstate-ut: Adjust variable scope cpufreq/amd-pstate-ut: Run on all of the correct CPUs cpufreq/amd-pstate-ut: Drop SUCCESS and FAIL enums cpufreq/amd-pstate-ut: Allow lowest nonlinear and lowest to be the same cpufreq/amd-pstate-ut: Use _free macro to free put policy cpufreq/amd-pstate: Drop `cppc_cap1_cached` cpufreq/amd-pstate: Overhaul locking cpufreq/amd-pstate: Move perf values into a union cpufreq/amd-pstate: Drop min and max cached frequencies cpufreq/amd-pstate: Show a warning when a CPU fails to setup cpufreq/amd-pstate: Invalidate cppc_req_cached during suspend cpufreq/amd-pstate: Fix the clamping of perf values ...
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‎arch/x86/include/asm/msr-index.h

Lines changed: 11 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -701,15 +701,17 @@
701701
#define MSR_AMD_CPPC_REQ 0xc00102b3
702702
#define MSR_AMD_CPPC_STATUS 0xc00102b4
703703

704-
#define AMD_CPPC_LOWEST_PERF(x) (((x) >> 0) & 0xff)
705-
#define AMD_CPPC_LOWNONLIN_PERF(x) (((x) >> 8) & 0xff)
706-
#define AMD_CPPC_NOMINAL_PERF(x) (((x) >> 16) & 0xff)
707-
#define AMD_CPPC_HIGHEST_PERF(x) (((x) >> 24) & 0xff)
708-
709-
#define AMD_CPPC_MAX_PERF(x) (((x) & 0xff) << 0)
710-
#define AMD_CPPC_MIN_PERF(x) (((x) & 0xff) << 8)
711-
#define AMD_CPPC_DES_PERF(x) (((x) & 0xff) << 16)
712-
#define AMD_CPPC_ENERGY_PERF_PREF(x) (((x) & 0xff) << 24)
704+
/* Masks for use with MSR_AMD_CPPC_CAP1 */
705+
#define AMD_CPPC_LOWEST_PERF_MASK GENMASK(7, 0)
706+
#define AMD_CPPC_LOWNONLIN_PERF_MASK GENMASK(15, 8)
707+
#define AMD_CPPC_NOMINAL_PERF_MASK GENMASK(23, 16)
708+
#define AMD_CPPC_HIGHEST_PERF_MASK GENMASK(31, 24)
709+
710+
/* Masks for use with MSR_AMD_CPPC_REQ */
711+
#define AMD_CPPC_MAX_PERF_MASK GENMASK(7, 0)
712+
#define AMD_CPPC_MIN_PERF_MASK GENMASK(15, 8)
713+
#define AMD_CPPC_DES_PERF_MASK GENMASK(23, 16)
714+
#define AMD_CPPC_EPP_PERF_MASK GENMASK(31, 24)
713715

714716
/* AMD Performance Counter Global Status and Control MSRs */
715717
#define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS 0xc0000300

‎arch/x86/kernel/acpi/cppc.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,8 @@
44
* Copyright (c) 2016, Intel Corporation.
55
*/
66

7+
#include <linux/bitfield.h>
8+
79
#include <acpi/cppc_acpi.h>
810
#include <asm/msr.h>
911
#include <asm/processor.h>
@@ -149,7 +151,7 @@ int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf)
149151
if (ret)
150152
goto out;
151153

152-
val = AMD_CPPC_HIGHEST_PERF(val);
154+
val = FIELD_GET(AMD_CPPC_HIGHEST_PERF_MASK, val);
153155
} else {
154156
ret = cppc_get_highest_perf(cpu, &val);
155157
if (ret)

‎drivers/cpufreq/amd-pstate-trace.h

Lines changed: 31 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -24,9 +24,9 @@
2424

2525
TRACE_EVENT(amd_pstate_perf,
2626

27-
TP_PROTO(unsigned long min_perf,
28-
unsigned long target_perf,
29-
unsigned long capacity,
27+
TP_PROTO(u8 min_perf,
28+
u8 target_perf,
29+
u8 capacity,
3030
u64 freq,
3131
u64 mperf,
3232
u64 aperf,
@@ -47,9 +47,9 @@ TRACE_EVENT(amd_pstate_perf,
4747
),
4848

4949
TP_STRUCT__entry(
50-
__field(unsigned long, min_perf)
51-
__field(unsigned long, target_perf)
52-
__field(unsigned long, capacity)
50+
__field(u8, min_perf)
51+
__field(u8, target_perf)
52+
__field(u8, capacity)
5353
__field(unsigned long long, freq)
5454
__field(unsigned long long, mperf)
5555
__field(unsigned long long, aperf)
@@ -70,10 +70,10 @@ TRACE_EVENT(amd_pstate_perf,
7070
__entry->fast_switch = fast_switch;
7171
),
7272

73-
TP_printk("amd_min_perf=%lu amd_des_perf=%lu amd_max_perf=%lu freq=%llu mperf=%llu aperf=%llu tsc=%llu cpu_id=%u fast_switch=%s",
74-
(unsigned long)__entry->min_perf,
75-
(unsigned long)__entry->target_perf,
76-
(unsigned long)__entry->capacity,
73+
TP_printk("amd_min_perf=%hhu amd_des_perf=%hhu amd_max_perf=%hhu freq=%llu mperf=%llu aperf=%llu tsc=%llu cpu_id=%u fast_switch=%s",
74+
(u8)__entry->min_perf,
75+
(u8)__entry->target_perf,
76+
(u8)__entry->capacity,
7777
(unsigned long long)__entry->freq,
7878
(unsigned long long)__entry->mperf,
7979
(unsigned long long)__entry->aperf,
@@ -86,27 +86,30 @@ TRACE_EVENT(amd_pstate_perf,
8686
TRACE_EVENT(amd_pstate_epp_perf,
8787

8888
TP_PROTO(unsigned int cpu_id,
89-
unsigned int highest_perf,
90-
unsigned int epp,
91-
unsigned int min_perf,
92-
unsigned int max_perf,
93-
bool boost
89+
u8 highest_perf,
90+
u8 epp,
91+
u8 min_perf,
92+
u8 max_perf,
93+
bool boost,
94+
bool changed
9495
),
9596

9697
TP_ARGS(cpu_id,
9798
highest_perf,
9899
epp,
99100
min_perf,
100101
max_perf,
101-
boost),
102+
boost,
103+
changed),
102104

103105
TP_STRUCT__entry(
104106
__field(unsigned int, cpu_id)
105-
__field(unsigned int, highest_perf)
106-
__field(unsigned int, epp)
107-
__field(unsigned int, min_perf)
108-
__field(unsigned int, max_perf)
107+
__field(u8, highest_perf)
108+
__field(u8, epp)
109+
__field(u8, min_perf)
110+
__field(u8, max_perf)
109111
__field(bool, boost)
112+
__field(bool, changed)
110113
),
111114

112115
TP_fast_assign(
@@ -116,15 +119,17 @@ TRACE_EVENT(amd_pstate_epp_perf,
116119
__entry->min_perf = min_perf;
117120
__entry->max_perf = max_perf;
118121
__entry->boost = boost;
122+
__entry->changed = changed;
119123
),
120124

121-
TP_printk("cpu%u: [%u<->%u]/%u, epp=%u, boost=%u",
125+
TP_printk("cpu%u: [%hhu<->%hhu]/%hhu, epp=%hhu, boost=%u, changed=%u",
122126
(unsigned int)__entry->cpu_id,
123-
(unsigned int)__entry->min_perf,
124-
(unsigned int)__entry->max_perf,
125-
(unsigned int)__entry->highest_perf,
126-
(unsigned int)__entry->epp,
127-
(bool)__entry->boost
127+
(u8)__entry->min_perf,
128+
(u8)__entry->max_perf,
129+
(u8)__entry->highest_perf,
130+
(u8)__entry->epp,
131+
(bool)__entry->boost,
132+
(bool)__entry->changed
128133
)
129134
);
130135

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