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pundiramitandersson
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clk: qcom: gcc-sdm845: Do not use shared clk_ops for QUPs
Similar to the earlier fixes meant for sm8x50 and x1e platforms, we have to stop using the shared clk ops for sdm845 QUPs as well. As Stephen Boyd pointed out in earlier fixes, there wasn't a problem to mark QUP clks shared until we started parking shared RCGs at clk registration time in commit 01a0a6c ("clk: qcom: Park shared RCGs upon registration"). Parking at init is actually harmful to the UART when earlycon is used. If the device is pumping out data while the frequency changes and we see garbage on the serial console until the driver can probe and actually set a proper frequency. This patch reverts the QUP clk sharing ops part of commit 06391ed ("clk: qcom: Add Global Clock controller (GCC) driver for SDM845"), so that the QUPs on sdm845 don't get parked during clk registration and break UART operations. Fixes: 01a0a6c ("clk: qcom: Park shared RCGs upon registration") Signed-off-by: Amit Pundir <amit.pundir@linaro.org> Link: https://lore.kernel.org/r/20241209174912.2526928-1-amit.pundir@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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drivers/clk/qcom/gcc-sdm845.c

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -449,7 +449,7 @@ static struct clk_init_data gcc_qupv3_wrap0_s0_clk_src_init = {
449449
.name = "gcc_qupv3_wrap0_s0_clk_src",
450450
.parent_data = gcc_parent_data_0,
451451
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
452-
.ops = &clk_rcg2_shared_ops,
452+
.ops = &clk_rcg2_ops,
453453
};
454454

455455
static struct clk_rcg2 gcc_qupv3_wrap0_s0_clk_src = {
@@ -465,7 +465,7 @@ static struct clk_init_data gcc_qupv3_wrap0_s1_clk_src_init = {
465465
.name = "gcc_qupv3_wrap0_s1_clk_src",
466466
.parent_data = gcc_parent_data_0,
467467
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
468-
.ops = &clk_rcg2_shared_ops,
468+
.ops = &clk_rcg2_ops,
469469
};
470470

471471
static struct clk_rcg2 gcc_qupv3_wrap0_s1_clk_src = {
@@ -481,7 +481,7 @@ static struct clk_init_data gcc_qupv3_wrap0_s2_clk_src_init = {
481481
.name = "gcc_qupv3_wrap0_s2_clk_src",
482482
.parent_data = gcc_parent_data_0,
483483
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
484-
.ops = &clk_rcg2_shared_ops,
484+
.ops = &clk_rcg2_ops,
485485
};
486486

487487
static struct clk_rcg2 gcc_qupv3_wrap0_s2_clk_src = {
@@ -497,7 +497,7 @@ static struct clk_init_data gcc_qupv3_wrap0_s3_clk_src_init = {
497497
.name = "gcc_qupv3_wrap0_s3_clk_src",
498498
.parent_data = gcc_parent_data_0,
499499
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
500-
.ops = &clk_rcg2_shared_ops,
500+
.ops = &clk_rcg2_ops,
501501
};
502502

503503
static struct clk_rcg2 gcc_qupv3_wrap0_s3_clk_src = {
@@ -513,7 +513,7 @@ static struct clk_init_data gcc_qupv3_wrap0_s4_clk_src_init = {
513513
.name = "gcc_qupv3_wrap0_s4_clk_src",
514514
.parent_data = gcc_parent_data_0,
515515
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
516-
.ops = &clk_rcg2_shared_ops,
516+
.ops = &clk_rcg2_ops,
517517
};
518518

519519
static struct clk_rcg2 gcc_qupv3_wrap0_s4_clk_src = {
@@ -529,7 +529,7 @@ static struct clk_init_data gcc_qupv3_wrap0_s5_clk_src_init = {
529529
.name = "gcc_qupv3_wrap0_s5_clk_src",
530530
.parent_data = gcc_parent_data_0,
531531
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
532-
.ops = &clk_rcg2_shared_ops,
532+
.ops = &clk_rcg2_ops,
533533
};
534534

535535
static struct clk_rcg2 gcc_qupv3_wrap0_s5_clk_src = {
@@ -545,7 +545,7 @@ static struct clk_init_data gcc_qupv3_wrap0_s6_clk_src_init = {
545545
.name = "gcc_qupv3_wrap0_s6_clk_src",
546546
.parent_data = gcc_parent_data_0,
547547
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
548-
.ops = &clk_rcg2_shared_ops,
548+
.ops = &clk_rcg2_ops,
549549
};
550550

551551
static struct clk_rcg2 gcc_qupv3_wrap0_s6_clk_src = {
@@ -561,7 +561,7 @@ static struct clk_init_data gcc_qupv3_wrap0_s7_clk_src_init = {
561561
.name = "gcc_qupv3_wrap0_s7_clk_src",
562562
.parent_data = gcc_parent_data_0,
563563
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
564-
.ops = &clk_rcg2_shared_ops,
564+
.ops = &clk_rcg2_ops,
565565
};
566566

567567
static struct clk_rcg2 gcc_qupv3_wrap0_s7_clk_src = {
@@ -577,7 +577,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s0_clk_src_init = {
577577
.name = "gcc_qupv3_wrap1_s0_clk_src",
578578
.parent_data = gcc_parent_data_0,
579579
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
580-
.ops = &clk_rcg2_shared_ops,
580+
.ops = &clk_rcg2_ops,
581581
};
582582

583583
static struct clk_rcg2 gcc_qupv3_wrap1_s0_clk_src = {
@@ -593,7 +593,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s1_clk_src_init = {
593593
.name = "gcc_qupv3_wrap1_s1_clk_src",
594594
.parent_data = gcc_parent_data_0,
595595
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
596-
.ops = &clk_rcg2_shared_ops,
596+
.ops = &clk_rcg2_ops,
597597
};
598598

599599
static struct clk_rcg2 gcc_qupv3_wrap1_s1_clk_src = {
@@ -609,7 +609,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s2_clk_src_init = {
609609
.name = "gcc_qupv3_wrap1_s2_clk_src",
610610
.parent_data = gcc_parent_data_0,
611611
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
612-
.ops = &clk_rcg2_shared_ops,
612+
.ops = &clk_rcg2_ops,
613613
};
614614

615615
static struct clk_rcg2 gcc_qupv3_wrap1_s2_clk_src = {
@@ -625,7 +625,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s3_clk_src_init = {
625625
.name = "gcc_qupv3_wrap1_s3_clk_src",
626626
.parent_data = gcc_parent_data_0,
627627
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
628-
.ops = &clk_rcg2_shared_ops,
628+
.ops = &clk_rcg2_ops,
629629
};
630630

631631
static struct clk_rcg2 gcc_qupv3_wrap1_s3_clk_src = {
@@ -641,7 +641,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s4_clk_src_init = {
641641
.name = "gcc_qupv3_wrap1_s4_clk_src",
642642
.parent_data = gcc_parent_data_0,
643643
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
644-
.ops = &clk_rcg2_shared_ops,
644+
.ops = &clk_rcg2_ops,
645645
};
646646

647647
static struct clk_rcg2 gcc_qupv3_wrap1_s4_clk_src = {
@@ -657,7 +657,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s5_clk_src_init = {
657657
.name = "gcc_qupv3_wrap1_s5_clk_src",
658658
.parent_data = gcc_parent_data_0,
659659
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
660-
.ops = &clk_rcg2_shared_ops,
660+
.ops = &clk_rcg2_ops,
661661
};
662662

663663
static struct clk_rcg2 gcc_qupv3_wrap1_s5_clk_src = {
@@ -673,7 +673,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s6_clk_src_init = {
673673
.name = "gcc_qupv3_wrap1_s6_clk_src",
674674
.parent_data = gcc_parent_data_0,
675675
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
676-
.ops = &clk_rcg2_shared_ops,
676+
.ops = &clk_rcg2_ops,
677677
};
678678

679679
static struct clk_rcg2 gcc_qupv3_wrap1_s6_clk_src = {
@@ -689,7 +689,7 @@ static struct clk_init_data gcc_qupv3_wrap1_s7_clk_src_init = {
689689
.name = "gcc_qupv3_wrap1_s7_clk_src",
690690
.parent_data = gcc_parent_data_0,
691691
.num_parents = ARRAY_SIZE(gcc_parent_data_0),
692-
.ops = &clk_rcg2_shared_ops,
692+
.ops = &clk_rcg2_ops,
693693
};
694694

695695
static struct clk_rcg2 gcc_qupv3_wrap1_s7_clk_src = {

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