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ahajdaThomas Hellström
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drm/xe: flush engine buffers before signalling user fence on all engines
Tests show that user fence signalling requires kind of write barrier, otherwise not all writes performed by the workload will be available to userspace. It is already done for render and compute, we need it also for the rest: video, gsc, copy. Fixes: dd08ebf ("drm/xe: Introduce a new DRM driver for Intel GPUs") Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240605-fix_user_fence_posted-v3-2-06e7932f784a@intel.com (cherry picked from commit 3ad7d18) Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
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drivers/gpu/drm/xe/xe_ring_ops.c

Lines changed: 16 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,16 @@ static int emit_store_imm_ggtt(u32 addr, u32 value, u32 *dw, int i)
8080
return i;
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}
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83+
static int emit_flush_dw(u32 *dw, int i)
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{
85+
dw[i++] = MI_FLUSH_DW | MI_FLUSH_IMM_DW;
86+
dw[i++] = 0;
87+
dw[i++] = 0;
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dw[i++] = 0;
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return i;
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}
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static int emit_flush_imm_ggtt(u32 addr, u32 value, bool invalidate_tlb,
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u32 *dw, int i)
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{
@@ -234,10 +244,12 @@ static void __emit_job_gen12_simple(struct xe_sched_job *job, struct xe_lrc *lrc
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i = emit_bb_start(batch_addr, ppgtt_flag, dw, i);
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237-
if (job->user_fence.used)
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if (job->user_fence.used) {
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i = emit_flush_dw(dw, i);
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i = emit_store_imm_ppgtt_posted(job->user_fence.addr,
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job->user_fence.value,
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dw, i);
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}
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i = emit_flush_imm_ggtt(xe_lrc_seqno_ggtt_addr(lrc), seqno, false, dw, i);
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@@ -293,10 +305,12 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
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i = emit_bb_start(batch_addr, ppgtt_flag, dw, i);
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296-
if (job->user_fence.used)
308+
if (job->user_fence.used) {
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i = emit_flush_dw(dw, i);
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i = emit_store_imm_ppgtt_posted(job->user_fence.addr,
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job->user_fence.value,
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dw, i);
313+
}
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i = emit_flush_imm_ggtt(xe_lrc_seqno_ggtt_addr(lrc), seqno, false, dw, i);
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