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brooniebroonie
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spi: spi-qpic-snand: extend bitmasks usage
Merge series from Gabor Juhos <j4g8y7@gmail.com>: The two patches in the series are extending the usage of FIELD_PREP() macro and predefined bitmasks usage in the driver.
2 parents 72b1767 + 76ebfa3 commit b00d686

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+23
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‎drivers/spi/spi-qpic-snand.c

Lines changed: 23 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -130,9 +130,9 @@ static void qcom_spi_set_read_loc_first(struct qcom_nand_controller *snandc,
130130
int is_last_read_loc)
131131
{
132132
__le32 locreg_val;
133-
u32 val = (((cw_offset) << READ_LOCATION_OFFSET) |
134-
((read_size) << READ_LOCATION_SIZE) | ((is_last_read_loc)
135-
<< READ_LOCATION_LAST));
133+
u32 val = FIELD_PREP(READ_LOCATION_OFFSET_MASK, cw_offset) |
134+
FIELD_PREP(READ_LOCATION_SIZE_MASK, read_size) |
135+
FIELD_PREP(READ_LOCATION_LAST_MASK, is_last_read_loc);
136136

137137
locreg_val = cpu_to_le32(val);
138138

@@ -151,9 +151,9 @@ static void qcom_spi_set_read_loc_last(struct qcom_nand_controller *snandc,
151151
int is_last_read_loc)
152152
{
153153
__le32 locreg_val;
154-
u32 val = (((cw_offset) << READ_LOCATION_OFFSET) |
155-
((read_size) << READ_LOCATION_SIZE) | ((is_last_read_loc)
156-
<< READ_LOCATION_LAST));
154+
u32 val = FIELD_PREP(READ_LOCATION_OFFSET_MASK, cw_offset) |
155+
FIELD_PREP(READ_LOCATION_SIZE_MASK, read_size) |
156+
FIELD_PREP(READ_LOCATION_LAST_MASK, is_last_read_loc);
157157

158158
locreg_val = cpu_to_le32(val);
159159

@@ -352,7 +352,7 @@ static int qcom_spi_ecc_init_ctx_pipelined(struct nand_device *nand)
352352
FIELD_PREP(ECC_MODE_MASK, 0) |
353353
FIELD_PREP(ECC_PARITY_SIZE_BYTES_BCH_MASK, ecc_cfg->ecc_bytes_hw);
354354

355-
ecc_cfg->ecc_buf_cfg = 0x203 << NUM_STEPS;
355+
ecc_cfg->ecc_buf_cfg = FIELD_PREP(NUM_STEPS_MASK, 0x203);
356356
ecc_cfg->clrflashstatus = FS_READY_BSY_N;
357357
ecc_cfg->clrreadstatus = 0xc0;
358358

@@ -483,7 +483,8 @@ static int qcom_spi_block_erase(struct qcom_nand_controller *snandc)
483483
snandc->regs->cmd = snandc->qspi->cmd;
484484
snandc->regs->addr0 = snandc->qspi->addr1;
485485
snandc->regs->addr1 = snandc->qspi->addr2;
486-
snandc->regs->cfg0 = cpu_to_le32(ecc_cfg->cfg0_raw & ~(7 << CW_PER_PAGE));
486+
snandc->regs->cfg0 = cpu_to_le32((ecc_cfg->cfg0_raw & ~CW_PER_PAGE_MASK) |
487+
FIELD_PREP(CW_PER_PAGE_MASK, 0));
487488
snandc->regs->cfg1 = cpu_to_le32(ecc_cfg->cfg1_raw);
488489
snandc->regs->exec = cpu_to_le32(1);
489490

@@ -560,8 +561,8 @@ static int qcom_spi_read_last_cw(struct qcom_nand_controller *snandc,
560561
snandc->regs->addr0 = (snandc->qspi->addr1 | cpu_to_le32(col));
561562
snandc->regs->addr1 = snandc->qspi->addr2;
562563

563-
cfg0 = (ecc_cfg->cfg0_raw & ~(7U << CW_PER_PAGE)) |
564-
0 << CW_PER_PAGE;
564+
cfg0 = (ecc_cfg->cfg0_raw & ~CW_PER_PAGE_MASK) |
565+
FIELD_PREP(CW_PER_PAGE_MASK, 0);
565566
cfg1 = ecc_cfg->cfg1_raw;
566567
ecc_bch_cfg = ECC_CFG_ECC_DISABLE;
567568

@@ -671,8 +672,8 @@ static int qcom_spi_read_cw_raw(struct qcom_nand_controller *snandc, u8 *data_bu
671672
qcom_clear_bam_transaction(snandc);
672673
raw_cw = num_cw - 1;
673674

674-
cfg0 = (ecc_cfg->cfg0_raw & ~(7U << CW_PER_PAGE)) |
675-
0 << CW_PER_PAGE;
675+
cfg0 = (ecc_cfg->cfg0_raw & ~CW_PER_PAGE_MASK) |
676+
FIELD_PREP(CW_PER_PAGE_MASK, 0);
676677
cfg1 = ecc_cfg->cfg1_raw;
677678
ecc_bch_cfg = ECC_CFG_ECC_DISABLE;
678679

@@ -789,8 +790,8 @@ static int qcom_spi_read_page_ecc(struct qcom_nand_controller *snandc,
789790
snandc->buf_start = 0;
790791
qcom_clear_read_regs(snandc);
791792

792-
cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) |
793-
(num_cw - 1) << CW_PER_PAGE;
793+
cfg0 = (ecc_cfg->cfg0 & ~CW_PER_PAGE_MASK) |
794+
FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1);
794795
cfg1 = ecc_cfg->cfg1;
795796
ecc_bch_cfg = ecc_cfg->ecc_bch_cfg;
796797

@@ -882,8 +883,8 @@ static int qcom_spi_read_page_oob(struct qcom_nand_controller *snandc,
882883
qcom_clear_read_regs(snandc);
883884
qcom_clear_bam_transaction(snandc);
884885

885-
cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) |
886-
(num_cw - 1) << CW_PER_PAGE;
886+
cfg0 = (ecc_cfg->cfg0 & ~CW_PER_PAGE_MASK) |
887+
FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1);
887888
cfg1 = ecc_cfg->cfg1;
888889
ecc_bch_cfg = ecc_cfg->ecc_bch_cfg;
889890

@@ -993,8 +994,8 @@ static int qcom_spi_program_raw(struct qcom_nand_controller *snandc,
993994
int num_cw = snandc->qspi->num_cw;
994995
u32 cfg0, cfg1, ecc_bch_cfg;
995996

996-
cfg0 = (ecc_cfg->cfg0_raw & ~(7U << CW_PER_PAGE)) |
997-
(num_cw - 1) << CW_PER_PAGE;
997+
cfg0 = (ecc_cfg->cfg0_raw & ~CW_PER_PAGE_MASK) |
998+
FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1);
998999
cfg1 = ecc_cfg->cfg1_raw;
9991000
ecc_bch_cfg = ECC_CFG_ECC_DISABLE;
10001001

@@ -1076,8 +1077,8 @@ static int qcom_spi_program_ecc(struct qcom_nand_controller *snandc,
10761077
int num_cw = snandc->qspi->num_cw;
10771078
u32 cfg0, cfg1, ecc_bch_cfg, ecc_buf_cfg;
10781079

1079-
cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) |
1080-
(num_cw - 1) << CW_PER_PAGE;
1080+
cfg0 = (ecc_cfg->cfg0 & ~CW_PER_PAGE_MASK) |
1081+
FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1);
10811082
cfg1 = ecc_cfg->cfg1;
10821083
ecc_bch_cfg = ecc_cfg->ecc_bch_cfg;
10831084
ecc_buf_cfg = ecc_cfg->ecc_buf_cfg;
@@ -1153,8 +1154,8 @@ static int qcom_spi_program_oob(struct qcom_nand_controller *snandc,
11531154
int num_cw = snandc->qspi->num_cw;
11541155
u32 cfg0, cfg1, ecc_bch_cfg, ecc_buf_cfg;
11551156

1156-
cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) |
1157-
(num_cw - 1) << CW_PER_PAGE;
1157+
cfg0 = (ecc_cfg->cfg0 & ~CW_PER_PAGE_MASK) |
1158+
FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1);
11581159
cfg1 = ecc_cfg->cfg1;
11591160
ecc_bch_cfg = ecc_cfg->ecc_bch_cfg;
11601161
ecc_buf_cfg = ecc_cfg->ecc_buf_cfg;

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