@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
70
70
{
71
71
struct meson_drm * priv = encoder_hdmi -> priv ;
72
72
int vic = drm_match_cea_mode (mode );
73
- unsigned int phy_freq ;
74
- unsigned int vclk_freq ;
75
- unsigned int venc_freq ;
76
- unsigned int hdmi_freq ;
73
+ unsigned long long phy_freq ;
74
+ unsigned long long vclk_freq ;
75
+ unsigned long long venc_freq ;
76
+ unsigned long long hdmi_freq ;
77
77
78
- vclk_freq = mode -> clock ;
78
+ vclk_freq = mode -> clock * 1000 ;
79
79
80
80
/* For 420, pixel clock is half unlike venc clock */
81
81
if (encoder_hdmi -> output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24 )
@@ -107,7 +107,8 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
107
107
if (mode -> flags & DRM_MODE_FLAG_DBLCLK )
108
108
venc_freq /= 2 ;
109
109
110
- dev_dbg (priv -> dev , "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n" ,
110
+ dev_dbg (priv -> dev ,
111
+ "vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n" ,
111
112
phy_freq , vclk_freq , venc_freq , hdmi_freq ,
112
113
priv -> venc .hdmi_use_enci );
113
114
@@ -122,10 +123,11 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
122
123
struct meson_encoder_hdmi * encoder_hdmi = bridge_to_meson_encoder_hdmi (bridge );
123
124
struct meson_drm * priv = encoder_hdmi -> priv ;
124
125
bool is_hdmi2_sink = display_info -> hdmi .scdc .supported ;
125
- unsigned int phy_freq ;
126
- unsigned int vclk_freq ;
127
- unsigned int venc_freq ;
128
- unsigned int hdmi_freq ;
126
+ unsigned long long clock = mode -> clock * 1000 ;
127
+ unsigned long long phy_freq ;
128
+ unsigned long long vclk_freq ;
129
+ unsigned long long venc_freq ;
130
+ unsigned long long hdmi_freq ;
129
131
int vic = drm_match_cea_mode (mode );
130
132
enum drm_mode_status status ;
131
133
@@ -144,12 +146,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
144
146
if (status != MODE_OK )
145
147
return status ;
146
148
147
- return meson_vclk_dmt_supported_freq (priv , mode -> clock );
149
+ return meson_vclk_dmt_supported_freq (priv , clock );
148
150
/* Check against supported VIC modes */
149
151
} else if (!meson_venc_hdmi_supported_vic (vic ))
150
152
return MODE_BAD ;
151
153
152
- vclk_freq = mode -> clock ;
154
+ vclk_freq = clock ;
153
155
154
156
/* For 420, pixel clock is half unlike venc clock */
155
157
if (drm_mode_is_420_only (display_info , mode ) ||
@@ -179,7 +181,8 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
179
181
if (mode -> flags & DRM_MODE_FLAG_DBLCLK )
180
182
venc_freq /= 2 ;
181
183
182
- dev_dbg (priv -> dev , "%s: vclk:%d phy=%d venc=%d hdmi=%d\n" ,
184
+ dev_dbg (priv -> dev ,
185
+ "%s: vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz\n" ,
183
186
__func__ , phy_freq , vclk_freq , venc_freq , hdmi_freq );
184
187
185
188
return meson_vclk_vic_supported_freq (priv , phy_freq , vclk_freq );
0 commit comments