Skip to content

Commit 9a68f6c

Browse files
miquelraynalbroonie
authored andcommitted
spi: zynq-qspi: Support per spi-mem operation frequency switches
Every ->exec_op() call correctly configures the spi bus speed to the maximum allowed frequency for the memory using the constant spi default parameter. Since we can now have per-operation constraints, let's use the value that comes from the spi-mem operation structure instead. In case there is no specific limitation for this operation, the default spi device value will be given anyway. The per-operation frequency capability is thus advertised to the spi-mem core. Cc: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-16-ad218dbc406f@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
1 parent b2fac31 commit 9a68f6c

File tree

1 file changed

+10
-3
lines changed

1 file changed

+10
-3
lines changed

drivers/spi/spi-zynq-qspi.c

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -318,6 +318,7 @@ static void zynq_qspi_chipselect(struct spi_device *spi, bool assert)
318318
* zynq_qspi_config_op - Configure QSPI controller for specified transfer
319319
* @xqspi: Pointer to the zynq_qspi structure
320320
* @spi: Pointer to the spi_device structure
321+
* @op: The memory operation to execute
321322
*
322323
* Sets the operational mode of QSPI controller for the next QSPI transfer and
323324
* sets the requested clock frequency.
@@ -331,7 +332,8 @@ static void zynq_qspi_chipselect(struct spi_device *spi, bool assert)
331332
* controller the driver will set the highest or lowest frequency supported by
332333
* controller.
333334
*/
334-
static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device *spi)
335+
static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device *spi,
336+
const struct spi_mem_op *op)
335337
{
336338
u32 config_reg, baud_rate_val = 0;
337339

@@ -346,7 +348,7 @@ static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device *spi)
346348
*/
347349
while ((baud_rate_val < ZYNQ_QSPI_CONFIG_BAUD_DIV_MAX) &&
348350
(clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) >
349-
spi->max_speed_hz)
351+
op->max_freq)
350352
baud_rate_val++;
351353

352354
config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET);
@@ -534,7 +536,7 @@ static int zynq_qspi_exec_mem_op(struct spi_mem *mem,
534536
op->dummy.buswidth, op->data.buswidth);
535537

536538
zynq_qspi_chipselect(mem->spi, true);
537-
zynq_qspi_config_op(xqspi, mem->spi);
539+
zynq_qspi_config_op(xqspi, mem->spi, op);
538540

539541
if (op->cmd.opcode) {
540542
reinit_completion(&xqspi->data_completion);
@@ -620,6 +622,10 @@ static const struct spi_controller_mem_ops zynq_qspi_mem_ops = {
620622
.exec_op = zynq_qspi_exec_mem_op,
621623
};
622624

625+
static const struct spi_controller_mem_caps zynq_qspi_mem_caps = {
626+
.per_op_freq = true,
627+
};
628+
623629
/**
624630
* zynq_qspi_probe - Probe method for the QSPI driver
625631
* @pdev: Pointer to the platform_device structure
@@ -706,6 +712,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)
706712
ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD |
707713
SPI_TX_DUAL | SPI_TX_QUAD;
708714
ctlr->mem_ops = &zynq_qspi_mem_ops;
715+
ctlr->mem_caps = &zynq_qspi_mem_caps;
709716
ctlr->setup = zynq_qspi_setup_op;
710717
ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2;
711718
ctlr->dev.of_node = np;

0 commit comments

Comments
 (0)