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Merge tag 'pinctrl-v6.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "Some new drivers is the main part, the rest is cleanups and nonurgent fixes. Nothing much special about this, no core changes this time. New drivers: - Renesas RZ/V2H(P) SoC - NXP Freescale i.MX91 SoC - Nuvoton MA35D1 SoC - Qualcomm PMC8380, SM4250, SM4250 LPI Enhancements: - A slew of scoped-based simplifications of of_node_put()" * tag 'pinctrl-v6.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits) pinctrl: renesas: rzg2l: Support output enable on RZ/G2L pinctrl: renesas: rzg2l: Clean up and refactor OEN read/write functions pinctrl: renesas: rzg2l: Clarify OEN read/write support dt-bindings: pinctrl: pinctrl-single: Fix pinctrl-single,gpio-range description dt-bindings: pinctrl: npcm8xx: add missing pin group and mux function dt-bindings: pinctrl: pinctrl-single: fix schmitt related properties pinctrl: freescale: Use scope based of_node_put() cleanups pinctrl: equilibrium: Use scope based of_node_put() cleanups pinctrl: ti: iodelay: Use scope based of_node_put() cleanups pinctrl: qcom: lpass-lpi: increase MAX_NR_GPIO to 32 pinctrl: cy8c95x0: Update cache modification pinctrl: cy8c95x0: Use cleanup.h pinctrl: renesas: r8a779h0: Remove unneeded separators pinctrl: renesas: r8a779g0: Add INTC-EX pins, groups, and function pinctrl: renesas: r8a779g0: Remove unneeded separators pinctrl: renesas: r8a779h0: Add AVB MII pins and groups pinctrl: renesas: r8a779g0: Fix TPU suffixes pinctrl: renesas: r8a779g0: Fix TCLK suffixes pinctrl: renesas: r8a779g0: FIX PWM suffixes pinctrl: renesas: r8a779g0: Fix IRQ suffixes ...
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Documentation/devicetree/bindings/firmware/arm,scmi.yaml

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@@ -255,7 +255,9 @@ properties:
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type: object
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allOf:
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- $ref: '#/$defs/protocol-node'
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- $ref: /schemas/pinctrl/pinctrl.yaml
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- anyOf:
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- $ref: /schemas/pinctrl/pinctrl.yaml
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- $ref: /schemas/firmware/nxp,imx95-scmi-pinctrl.yaml
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unevaluatedProperties: false
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2024 NXP
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/firmware/nxp,imx95-scmi-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: i.MX System Control and Management Interface (SCMI) Pinctrl Protocol
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maintainers:
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- Peng Fan <peng.fan@nxp.com>
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allOf:
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- $ref: /schemas/pinctrl/pinctrl.yaml
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patternProperties:
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'grp$':
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type: object
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description:
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Pinctrl node's client devices use subnodes for desired pin configuration.
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Client device subnodes use below standard properties.
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unevaluatedProperties: false
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properties:
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fsl,pins:
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description:
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each entry consists of 6 integers and represents the mux and config
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setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
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mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
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be found in <arch/arm64/boot/dts/freescale/imx95-pinfunc.h>. The last
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integer CONFIG is the pad setting value like pull-up on this pin.
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Please refer to i.MX95 Reference Manual for detailed CONFIG settings.
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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items:
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items:
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- description: |
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"mux_reg" indicates the offset of mux register.
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- description: |
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"conf_reg" indicates the offset of pad configuration register.
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- description: |
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"input_reg" indicates the offset of select input register.
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- description: |
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"mux_val" indicates the mux value to be applied.
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- description: |
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"input_val" indicates the select input value to be applied.
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- description: |
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"pad_setting" indicates the pad configuration value to be applied.
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required:
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- fsl,pins
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additionalProperties: true

Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml

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patternProperties:
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"^function|groups$":
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enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
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ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,
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EXTRST, FLACK, FLBUSY, FLWP, GPID, GPID0, GPID2, GPID4, GPID6, GPIE0,
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GPIE2, GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13, I2C14, I2C3, I2C4,
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I2C5, I2C6, I2C7, I2C8, I2C9, LPCPD, LPCPME, LPCRST, LPCSMI, MAC1LINK,
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MAC2LINK, MDIO1, MDIO2, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2,
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NDCD3, NDCD4, NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4,
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NDTS4, NRI1, NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, OSCCLK, PWM0,
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PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1,
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RMII2, ROM16, ROM8, ROMCS1, ROMCS2, ROMCS3, ROMCS4, RXD1, RXD2, RXD3,
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RXD4, SALT1, SALT2, SALT3, SALT4, SD1, SD2, SGPMCK, SGPMI, SGPMLD,
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SGPMO, SGPSCK, SGPSI0, SGPSI1, SGPSLD, SIOONCTRL, SIOPBI, SIOPBO,
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SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1DEBUG, SPI1PASSTHRU,
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SPICS1, TIMER3, TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1, TXD2,
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TXD3, TXD4, UART6, USB11D1, USB11H2, USB2D1, USB2H1, USBCKI, VGABIOS_ROM,
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VGAHS, VGAVS, VPI18, VPI24, VPI30, VPO12, VPO24, WDTRST1, WDTRST2]
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enum:
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- ACPI
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- ADC0
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- ADC1
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- ADC10
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- ADC11
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- ADC12
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- ADC13
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- ADC14
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- ADC15
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- ADC2
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- ADC3
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- ADC4
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- ADC5
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- ADC6
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- ADC7
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- ADC8
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- ADC9
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- BMCINT
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- DDCCLK
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- DDCDAT
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- EXTRST
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- FLACK
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- FLBUSY
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- FLWP
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- GPID
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- GPID0
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- GPID2
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- GPID4
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- GPID6
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- GPIE0
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- GPIE2
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- GPIE4
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- GPIE6
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- I2C10
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- I2C11
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- I2C12
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- I2C13
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- I2C14
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- I2C3
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- I2C4
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- I2C5
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- I2C6
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- I2C7
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- I2C8
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- I2C9
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- LPCPD
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- LPCPME
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- LPCRST
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- LPCSMI
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- MAC1LINK
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- MAC2LINK
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- MDIO1
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- MDIO2
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- NCTS1
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- NCTS2
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- NCTS3
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- NCTS4
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- NDCD1
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- NDCD2
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- NDCD3
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- NDCD4
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- NDSR1
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- NDSR2
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- NDSR3
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- NDSR4
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- NDTR1
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- NDTR2
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- NDTR3
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- NDTR4
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- NDTS4
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- NRI1
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- NRI2
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- NRI3
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- NRI4
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- NRTS1
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- NRTS2
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- NRTS3
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- OSCCLK
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- PWM0
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- PWM1
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- PWM2
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- PWM3
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- PWM4
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- PWM5
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- PWM6
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- PWM7
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- RGMII1
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- RGMII2
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- RMII1
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- RMII2
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- ROM16
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- ROM8
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- ROMCS1
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- ROMCS2
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- ROMCS3
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- ROMCS4
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- RXD1
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- RXD2
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- RXD3
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- RXD4
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- SALT1
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- SALT2
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- SALT3
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- SALT4
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- SD1
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- SD2
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- SGPMCK
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- SGPMI
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- SGPMLD
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- SGPMO
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- SGPSCK
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- SGPSI0
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- SGPSI1
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- SGPSLD
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- SIOONCTRL
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- SIOPBI
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- SIOPBO
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- SIOPWREQ
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- SIOPWRGD
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- SIOS3
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- SIOS5
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- SIOSCI
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- SPI1
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- SPI1DEBUG
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- SPI1PASSTHRU
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- SPICS1
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- TIMER3
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- TIMER4
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- TIMER5
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- TIMER6
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- TIMER7
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- TIMER8
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- TXD1
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- TXD2
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- TXD3
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- TXD4
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- UART6
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- USB11D1
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- USB11H2
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- USB2D1
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- USB2H1
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- USBCKI
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- VGABIOS_ROM
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- VGAHS
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- VGAVS
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- VPI18
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- VPI24
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- VPI30
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- VPO12
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- VPO24
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- WDTRST1
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- WDTRST2
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allOf:
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- $ref: pinctrl.yaml#

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