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arunpravin24alexdeucher
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drm/amdgpu: Add DCC GFX12 flag to enable address alignment
We require this flag AMDGPU_GEM_CREATE_GFX12_DCC or any other kernel level GFX12 DCC flag to differentiate the DCC buffers and other pinned display buffers(which has TTM_PL_FLAG_CONTIGUOUS enabled). If we use the TTM_PL_FLAG_CONTIGUOUS flag for DCC buffers, we may over allocate for all the pinned display buffers unnecessarily that leads to memory allocation failure. Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 46142cc)
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drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -512,7 +512,8 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
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/* Allocate blocks in desired range */
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vres->flags |= DRM_BUDDY_RANGE_ALLOCATION;
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if (adev->gmc.gmc_funcs->get_dcc_alignment)
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if (bo->flags & AMDGPU_GEM_CREATE_GFX12_DCC &&
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adev->gmc.gmc_funcs->get_dcc_alignment)
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adjust_dcc_size = amdgpu_gmc_get_dcc_alignment(adev);
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remaining_size = (u64)vres->base.size;

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