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Merge patch series "Zacas/Zabha support and qspinlocks"
Alexandre Ghiti <alexghiti@rivosinc.com> says: This implements [cmp]xchgXX() macros using Zacas and Zabha extensions and finally uses those newly introduced macros to add support for qspinlocks: note that this implementation of qspinlocks satisfies the forward progress guarantee. It also uses Ziccrse to provide the qspinlock implementation. Thanks to Guo and Leonardo for their work! * b4-shazam-merge: (1314 commits) riscv: Add qspinlock support dt-bindings: riscv: Add Ziccrse ISA extension description riscv: Add ISA extension parsing for Ziccrse asm-generic: ticket-lock: Add separate ticket-lock.h asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock riscv: Implement xchg8/16() using Zabha riscv: Implement arch_cmpxchg128() using Zacas riscv: Improve zacas fully-ordered cmpxchg() riscv: Implement cmpxchg8/16() using Zabha dt-bindings: riscv: Add Zabha ISA extension description riscv: Implement cmpxchg32/64() using Zacas riscv: Do not fail to build on byte/halfword operations with Zawrs riscv: Move cpufeature.h macros into their own header Link: https://lore.kernel.org/r/20241103145153.105097-1-alexghiti@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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‎.mailmap

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@@ -73,6 +73,8 @@ Andrey Ryabinin <ryabinin.a.a@gmail.com> <aryabinin@virtuozzo.com>
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Andrzej Hajda <andrzej.hajda@intel.com> <a.hajda@samsung.com>
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André Almeida <andrealmeid@igalia.com> <andrealmeid@collabora.com>
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Andy Adamson <andros@citi.umich.edu>
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Andy Chiu <andybnac@gmail.com> <andy.chiu@sifive.com>
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Andy Chiu <andybnac@gmail.com> <taochiu@synology.com>
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Andy Shevchenko <andy@kernel.org> <andy@smile.org.ua>
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Andy Shevchenko <andy@kernel.org> <ext-andriy.shevchenko@nokia.com>
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Anilkumar Kolli <quic_akolli@quicinc.com> <akolli@codeaurora.org>
@@ -203,12 +205,16 @@ Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> <ezequiel@collabora.com>
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Faith Ekstrand <faith.ekstrand@collabora.com> <jason@jlekstrand.net>
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Faith Ekstrand <faith.ekstrand@collabora.com> <jason.ekstrand@intel.com>
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Faith Ekstrand <faith.ekstrand@collabora.com> <jason.ekstrand@collabora.com>
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Fangrui Song <i@maskray.me> <maskray@google.com>
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Felipe W Damasio <felipewd@terra.com.br>
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Felix Kuhling <fxkuehl@gmx.de>
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Felix Moeller <felix@derklecks.de>
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Fenglin Wu <quic_fenglinw@quicinc.com> <fenglinw@codeaurora.org>
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Filipe Lautert <filipe@icewall.org>
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Finn Thain <fthain@linux-m68k.org> <fthain@telegraphics.com.au>
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Fiona Behrens <me@kloenk.dev>
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Fiona Behrens <me@kloenk.dev> <me@kloenk.de>
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Fiona Behrens <me@kloenk.dev> <fin@nyantec.com>
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Franck Bui-Huu <vagabon.xyz@gmail.com>
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Frank Rowand <frowand.list@gmail.com> <frank.rowand@am.sony.com>
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Frank Rowand <frowand.list@gmail.com> <frank.rowand@sony.com>
@@ -300,6 +306,11 @@ Jens Axboe <axboe@kernel.dk> <axboe@fb.com>
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Jens Axboe <axboe@kernel.dk> <axboe@meta.com>
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Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
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Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
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Jesper Dangaard Brouer <hawk@kernel.org> <brouer@redhat.com>
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Jesper Dangaard Brouer <hawk@kernel.org> <hawk@comx.dk>
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Jesper Dangaard Brouer <hawk@kernel.org> <jbrouer@redhat.com>
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Jesper Dangaard Brouer <hawk@kernel.org> <jdb@comx.dk>
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Jesper Dangaard Brouer <hawk@kernel.org> <netoptimizer@brouer.com>
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Jessica Zhang <quic_jesszhan@quicinc.com> <jesszhan@codeaurora.org>
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Jilai Wang <quic_jilaiw@quicinc.com> <jilaiw@codeaurora.org>
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Jiri Kosina <jikos@kernel.org> <jikos@jikos.cz>

‎CREDITS

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D: ISDN Maintainer
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S: USA
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N: Gerrit Renker
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E: gerrit@erg.abdn.ac.uk
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D: DCCP protocol support.
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N: Philip Gladstone
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D: Kernel / timekeeping stuff
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D: bug toaster (A1 sauce makes all the difference)
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D: Random linux hacker
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N: James Hogan
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E: jhogan@kernel.org
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D: Metag architecture maintainer
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D: TZ1090 SoC maintainer
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D: i2c-sis96x and i2c-stub SMBus drivers
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N: James Hogan
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E: jhogan@kernel.org
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D: Metag architecture maintainer
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D: TZ1090 SoC maintainer
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D: The XFree86[tm] Project
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N: Seth Jennings
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E: sjenning@redhat.com
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D: Creation and maintenance of zswap
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D: Maintainer of SPU File System
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D: Maintenance and development of the hugetlb subsystem
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D: Creation and maintenance of zswap
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D: Maintenance and development of zswap
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D: Creation and maintenance of the zpool API
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D: CYPRESS CY82C693 chipset IDE, Digital's PC-Alpha 164SX boards
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D: CoreSight kernel subsystem, Maintainer 2014-2022
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D: Perf tool support for CoreSight
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‎Documentation/admin-guide/LSM/ipe.rst

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authorization of the policies (prohibiting an attacker from gaining
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policies must be signed by a certificate that chains to the
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``SYSTEM_TRUSTED_KEYRING``, or to the secondary and/or platform keyrings if
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``CONFIG_IPE_POLICY_SIG_SECONDARY_KEYRING`` and/or
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the currently-running version. This is to prevent rollback attacks.
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‎Documentation/admin-guide/pm/cpufreq.rst

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‎Documentation/arch/arm/mem_alignment.rst

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‎Documentation/arch/arm64/silicon-errata.rst

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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A715 | #3456084 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-N3 | #3456111 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| Microsoft | Azure Cobalt 100| #2253138 | ARM64_ERRATUM_2253138 |
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| Microsoft | Azure Cobalt 100| #3324339 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+

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