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cxl: Cleanup partition size and perf helpers
Now that the 'struct cxl_dpa_partition' array contains both size and performance information, all paths that iterate over that information can use a loop rather than hard-code 'ram' and 'pmem' lookups. Remove, or reduce the scope of the temporary helpers that bridged the pre-'struct cxl_dpa_partition' state of the code to the post-'struct cxl_dpa_partition' state. - to_{ram,pmem}_perf(): scope reduced to just sysfs_emit + is_visible() helpers - to_{ram,pmem}_res(): fold into their only users cxl_{ram,pmem}_size() - cxl_ram_size(): scope reduced to ram_size_show() (Note, cxl_pmem_size() also used to gate nvdimm registration) In short, memdev sysfs ABI already made the promise that 0-sized partitions will show for memdevs, but that can be avoided for future partitions by using dynamic sysfs group visibility (new relative to when the partition ABI first shipped upstream). Cc: Dave Jiang <dave.jiang@intel.com> Cc: Alejandro Lucero <alucerop@amd.com> Cc: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Tested-by: Alejandro Lucero <alucerop@amd.com> Link: https://patch.msgid.link/173864307519.668823.10800104022426067621.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
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lines changed

drivers/cxl/core/cdat.c

Lines changed: 27 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -306,9 +306,6 @@ static int match_cxlrd_qos_class(struct device *dev, void *data)
306306

307307
static void reset_dpa_perf(struct cxl_dpa_perf *dpa_perf)
308308
{
309-
if (!dpa_perf)
310-
return;
311-
312309
*dpa_perf = (struct cxl_dpa_perf) {
313310
.qos_class = CXL_QOS_CLASS_INVALID,
314311
};
@@ -317,9 +314,6 @@ static void reset_dpa_perf(struct cxl_dpa_perf *dpa_perf)
317314
static bool cxl_qos_match(struct cxl_port *root_port,
318315
struct cxl_dpa_perf *dpa_perf)
319316
{
320-
if (!dpa_perf)
321-
return false;
322-
323317
if (dpa_perf->qos_class == CXL_QOS_CLASS_INVALID)
324318
return false;
325319

@@ -351,37 +345,46 @@ static int match_cxlrd_hb(struct device *dev, void *data)
351345
return 0;
352346
}
353347

354-
static int cxl_qos_class_verify(struct cxl_memdev *cxlmd)
348+
static void cxl_qos_class_verify(struct cxl_memdev *cxlmd)
355349
{
356350
struct cxl_dev_state *cxlds = cxlmd->cxlds;
357-
struct cxl_dpa_perf *ram_perf = to_ram_perf(cxlds),
358-
*pmem_perf = to_pmem_perf(cxlds);
359351
struct cxl_port *root_port;
360-
int rc;
361352

362353
struct cxl_root *cxl_root __free(put_cxl_root) =
363354
find_cxl_root(cxlmd->endpoint);
364355

356+
/*
357+
* No need to reset_dpa_perf() here as find_cxl_root() is guaranteed to
358+
* succeed when called in the cxl_endpoint_port_probe() path.
359+
*/
365360
if (!cxl_root)
366-
return -ENODEV;
361+
return;
367362

368363
root_port = &cxl_root->port;
369364

370-
/* Check that the QTG IDs are all sane between end device and root decoders */
371-
if (!cxl_qos_match(root_port, ram_perf))
372-
reset_dpa_perf(ram_perf);
373-
if (!cxl_qos_match(root_port, pmem_perf))
374-
reset_dpa_perf(pmem_perf);
375-
376-
/* Check to make sure that the device's host bridge is under a root decoder */
377-
rc = device_for_each_child(&root_port->dev,
378-
cxlmd->endpoint->host_bridge, match_cxlrd_hb);
379-
if (!rc) {
380-
reset_dpa_perf(ram_perf);
381-
reset_dpa_perf(pmem_perf);
365+
/*
366+
* Save userspace from needing to check if a qos class has any matches
367+
* by hiding qos class info if the memdev is not mapped by a root
368+
* decoder, or the partition class does not match any root decoder
369+
* class.
370+
*/
371+
if (!device_for_each_child(&root_port->dev,
372+
cxlmd->endpoint->host_bridge,
373+
match_cxlrd_hb)) {
374+
for (int i = 0; i < cxlds->nr_partitions; i++) {
375+
struct cxl_dpa_perf *perf = &cxlds->part[i].perf;
376+
377+
reset_dpa_perf(perf);
378+
}
379+
return;
382380
}
383381

384-
return rc;
382+
for (int i = 0; i < cxlds->nr_partitions; i++) {
383+
struct cxl_dpa_perf *perf = &cxlds->part[i].perf;
384+
385+
if (!cxl_qos_match(root_port, perf))
386+
reset_dpa_perf(perf);
387+
}
385388
}
386389

387390
static void discard_dsmas(struct xarray *xa)

drivers/cxl/core/memdev.c

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -75,6 +75,14 @@ static ssize_t label_storage_size_show(struct device *dev,
7575
}
7676
static DEVICE_ATTR_RO(label_storage_size);
7777

78+
static resource_size_t cxl_ram_size(struct cxl_dev_state *cxlds)
79+
{
80+
/* Static RAM is only expected at partition 0. */
81+
if (cxlds->part[0].mode != CXL_PARTMODE_RAM)
82+
return 0;
83+
return resource_size(&cxlds->part[0].res);
84+
}
85+
7886
static ssize_t ram_size_show(struct device *dev, struct device_attribute *attr,
7987
char *buf)
8088
{
@@ -399,6 +407,14 @@ static struct attribute *cxl_memdev_attributes[] = {
399407
NULL,
400408
};
401409

410+
static struct cxl_dpa_perf *to_pmem_perf(struct cxl_dev_state *cxlds)
411+
{
412+
for (int i = 0; i < cxlds->nr_partitions; i++)
413+
if (cxlds->part[i].mode == CXL_PARTMODE_PMEM)
414+
return &cxlds->part[i].perf;
415+
return NULL;
416+
}
417+
402418
static ssize_t pmem_qos_class_show(struct device *dev,
403419
struct device_attribute *attr, char *buf)
404420
{
@@ -417,6 +433,13 @@ static struct attribute *cxl_memdev_pmem_attributes[] = {
417433
NULL,
418434
};
419435

436+
static struct cxl_dpa_perf *to_ram_perf(struct cxl_dev_state *cxlds)
437+
{
438+
if (cxlds->part[0].mode != CXL_PARTMODE_RAM)
439+
return NULL;
440+
return &cxlds->part[0].perf;
441+
}
442+
420443
static ssize_t ram_qos_class_show(struct device *dev,
421444
struct device_attribute *attr, char *buf)
422445
{

drivers/cxl/cxlmem.h

Lines changed: 7 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -470,58 +470,16 @@ struct cxl_dev_state {
470470
struct cxl_mailbox cxl_mbox;
471471
};
472472

473-
474-
/* Static RAM is only expected at partition 0. */
475-
static inline const struct resource *to_ram_res(struct cxl_dev_state *cxlds)
476-
{
477-
if (cxlds->part[0].mode != CXL_PARTMODE_RAM)
478-
return NULL;
479-
return &cxlds->part[0].res;
480-
}
481-
482-
/*
483-
* Static PMEM may be at partition index 0 when there is no static RAM
484-
* capacity.
485-
*/
486-
static inline const struct resource *to_pmem_res(struct cxl_dev_state *cxlds)
487-
{
488-
for (int i = 0; i < cxlds->nr_partitions; i++)
489-
if (cxlds->part[i].mode == CXL_PARTMODE_PMEM)
490-
return &cxlds->part[i].res;
491-
return NULL;
492-
}
493-
494-
static inline struct cxl_dpa_perf *to_ram_perf(struct cxl_dev_state *cxlds)
495-
{
496-
if (cxlds->part[0].mode != CXL_PARTMODE_RAM)
497-
return NULL;
498-
return &cxlds->part[0].perf;
499-
}
500-
501-
static inline struct cxl_dpa_perf *to_pmem_perf(struct cxl_dev_state *cxlds)
473+
static inline resource_size_t cxl_pmem_size(struct cxl_dev_state *cxlds)
502474
{
475+
/*
476+
* Static PMEM may be at partition index 0 when there is no static RAM
477+
* capacity.
478+
*/
503479
for (int i = 0; i < cxlds->nr_partitions; i++)
504480
if (cxlds->part[i].mode == CXL_PARTMODE_PMEM)
505-
return &cxlds->part[i].perf;
506-
return NULL;
507-
}
508-
509-
static inline resource_size_t cxl_ram_size(struct cxl_dev_state *cxlds)
510-
{
511-
const struct resource *res = to_ram_res(cxlds);
512-
513-
if (!res)
514-
return 0;
515-
return resource_size(res);
516-
}
517-
518-
static inline resource_size_t cxl_pmem_size(struct cxl_dev_state *cxlds)
519-
{
520-
const struct resource *res = to_pmem_res(cxlds);
521-
522-
if (!res)
523-
return 0;
524-
return resource_size(res);
481+
return resource_size(&cxlds->part[i].res);
482+
return 0;
525483
}
526484

527485
static inline struct cxl_dev_state *mbox_to_cxlds(struct cxl_mailbox *cxl_mbox)

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