@@ -117,68 +117,64 @@ unevaluatedProperties: false
117
117
118
118
examples :
119
119
- |
120
- #include <dt-bindings/interrupt-controller/arm-gic.h>
121
-
122
- bus {
123
- #address-cells = <1>;
124
- #size-cells = <1>;
125
- pcie0: pcie@18012000 {
126
- compatible = "brcm,iproc-pcie";
127
- reg = <0x18012000 0x1000>;
128
-
129
- #interrupt-cells = <1>;
130
- interrupt-map-mask = <0 0 0 0>;
131
- interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
132
-
133
- linux,pci-domain = <0>;
134
-
135
- bus-range = <0x00 0xff>;
136
-
137
- #address-cells = <3>;
138
- #size-cells = <2>;
139
- device_type = "pci";
140
- ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
141
- <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
142
-
143
- phys = <&phy 0 5>;
144
- phy-names = "pcie-phy";
145
-
146
- brcm,pcie-ob;
147
- brcm,pcie-ob-axi-offset = <0x00000000>;
148
-
149
- msi-parent = <&msi0>;
150
-
151
- /* iProc event queue based MSI */
152
- msi0: msi {
153
- compatible = "brcm,iproc-msi";
154
- msi-controller;
155
- interrupt-parent = <&gic>;
156
- interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
157
- <GIC_SPI 97 IRQ_TYPE_NONE>,
158
- <GIC_SPI 98 IRQ_TYPE_NONE>,
159
- <GIC_SPI 99 IRQ_TYPE_NONE>;
160
- };
161
- };
162
-
163
- pcie1: pcie@18013000 {
164
- compatible = "brcm,iproc-pcie";
165
- reg = <0x18013000 0x1000>;
166
-
167
- #interrupt-cells = <1>;
168
- interrupt-map-mask = <0 0 0 0>;
169
- interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
170
-
171
- linux,pci-domain = <1>;
172
-
173
- bus-range = <0x00 0xff>;
174
-
175
- #address-cells = <3>;
176
- #size-cells = <2>;
177
- device_type = "pci";
178
- ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
179
- <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
180
-
181
- phys = <&phy 1 6>;
182
- phy-names = "pcie-phy";
183
- };
120
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
121
+
122
+ pcie@18012000 {
123
+ compatible = "brcm,iproc-pcie";
124
+ reg = <0x18012000 0x1000>;
125
+
126
+ #interrupt-cells = <1>;
127
+ interrupt-map-mask = <0 0 0 0>;
128
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
129
+
130
+ linux,pci-domain = <0>;
131
+
132
+ bus-range = <0x00 0xff>;
133
+
134
+ #address-cells = <3>;
135
+ #size-cells = <2>;
136
+ device_type = "pci";
137
+ ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
138
+ <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
139
+
140
+ phys = <&phy 0 5>;
141
+ phy-names = "pcie-phy";
142
+
143
+ brcm,pcie-ob;
144
+ brcm,pcie-ob-axi-offset = <0x00000000>;
145
+
146
+ msi-parent = <&msi0>;
147
+
148
+ /* iProc event queue based MSI */
149
+ msi0: msi {
150
+ compatible = "brcm,iproc-msi";
151
+ msi-controller;
152
+ interrupt-parent = <&gic>;
153
+ interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
154
+ <GIC_SPI 97 IRQ_TYPE_NONE>,
155
+ <GIC_SPI 98 IRQ_TYPE_NONE>,
156
+ <GIC_SPI 99 IRQ_TYPE_NONE>;
157
+ };
158
+ };
159
+ - |
160
+ pcie@18013000 {
161
+ compatible = "brcm,iproc-pcie";
162
+ reg = <0x18013000 0x1000>;
163
+
164
+ #interrupt-cells = <1>;
165
+ interrupt-map-mask = <0 0 0 0>;
166
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
167
+
168
+ linux,pci-domain = <1>;
169
+
170
+ bus-range = <0x00 0xff>;
171
+
172
+ #address-cells = <3>;
173
+ #size-cells = <2>;
174
+ device_type = "pci";
175
+ ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
176
+ <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
177
+
178
+ phys = <&phy 1 6>;
179
+ phy-names = "pcie-phy";
184
180
};
0 commit comments