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Bo-Cun Chenkuba-moo
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net: ethernet: mtk_eth_soc: net: revise NETSYSv3 hardware configuration
Change hardware configuration for the NETSYSv3. - Enable PSE dummy page mechanism for the GDM1/2/3 - Enable PSE drop mechanism when the WDMA Rx ring full - Enable PSE no-drop mechanism for packets from the WDMA Tx - Correct PSE free drop threshold - Correct PSE CDMA high threshold Fixes: 1953f13 ("net: ethernet: mtk_eth_soc: add NETSYS_V3 version support") Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/b71f8fd9d4bb69c646c4d558f9331dd965068606.1744907886.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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drivers/net/ethernet/mediatek/mtk_eth_soc.c

Lines changed: 20 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4043,11 +4043,27 @@ static int mtk_hw_init(struct mtk_eth *eth, bool reset)
40434043
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
40444044

40454045
if (mtk_is_netsys_v3_or_greater(eth)) {
4046-
/* PSE should not drop port1, port8 and port9 packets */
4047-
mtk_w32(eth, 0x00000302, PSE_DROP_CFG);
4046+
/* PSE dummy page mechanism */
4047+
mtk_w32(eth, PSE_DUMMY_WORK_GDM(1) | PSE_DUMMY_WORK_GDM(2) |
4048+
PSE_DUMMY_WORK_GDM(3) | DUMMY_PAGE_THR, PSE_DUMY_REQ);
4049+
4050+
/* PSE free buffer drop threshold */
4051+
mtk_w32(eth, 0x00600009, PSE_IQ_REV(8));
4052+
4053+
/* PSE should not drop port8, port9 and port13 packets from
4054+
* WDMA Tx
4055+
*/
4056+
mtk_w32(eth, 0x00002300, PSE_DROP_CFG);
4057+
4058+
/* PSE should drop packets to port8, port9 and port13 on WDMA Rx
4059+
* ring full
4060+
*/
4061+
mtk_w32(eth, 0x00002300, PSE_PPE_DROP(0));
4062+
mtk_w32(eth, 0x00002300, PSE_PPE_DROP(1));
4063+
mtk_w32(eth, 0x00002300, PSE_PPE_DROP(2));
40484064

40494065
/* GDM and CDM Threshold */
4050-
mtk_w32(eth, 0x00000707, MTK_CDMW0_THRES);
4066+
mtk_w32(eth, 0x08000707, MTK_CDMW0_THRES);
40514067
mtk_w32(eth, 0x00000077, MTK_CDMW1_THRES);
40524068

40534069
/* Disable GDM1 RX CRC stripping */
@@ -4064,7 +4080,7 @@ static int mtk_hw_init(struct mtk_eth *eth, bool reset)
40644080
mtk_w32(eth, 0x00000300, PSE_DROP_CFG);
40654081

40664082
/* PSE should drop packets to port 8/9 on WDMA Rx ring full */
4067-
mtk_w32(eth, 0x00000300, PSE_PPE0_DROP);
4083+
mtk_w32(eth, 0x00000300, PSE_PPE_DROP(0));
40684084

40694085
/* PSE Free Queue Flow Control */
40704086
mtk_w32(eth, 0x01fa01f4, PSE_FQFC_CFG2);

drivers/net/ethernet/mediatek/mtk_eth_soc.h

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -151,7 +151,15 @@
151151
#define PSE_FQFC_CFG1 0x100
152152
#define PSE_FQFC_CFG2 0x104
153153
#define PSE_DROP_CFG 0x108
154-
#define PSE_PPE0_DROP 0x110
154+
#define PSE_PPE_DROP(x) (0x110 + ((x) * 0x4))
155+
156+
/* PSE Last FreeQ Page Request Control */
157+
#define PSE_DUMY_REQ 0x10C
158+
/* PSE_DUMY_REQ is not a typo but actually called like that also in
159+
* MediaTek's datasheet
160+
*/
161+
#define PSE_DUMMY_WORK_GDM(x) BIT(16 + (x))
162+
#define DUMMY_PAGE_THR 0x1
155163

156164
/* PSE Input Queue Reservation Register*/
157165
#define PSE_IQ_REV(x) (0x140 + (((x) - 1) << 2))

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