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drm/i915: Introduce i915_error_regs
Introduce i915_error_regs as the EIR/EMR counterpart to the IIR/IMR/IER i915_irq_regs, and update the irq reset/postingstall to utilize them accordingly. v2: Include xe compat versions Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250217070047.953-7-ville.syrjala@linux.intel.com Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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5 files changed

+65
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‎drivers/gpu/drm/i915/i915_irq.c

Lines changed: 27 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,29 @@ void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
120120
intel_uncore_posting_read(uncore, regs.imr);
121121
}
122122

123+
void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
124+
{
125+
intel_uncore_write(uncore, regs.emr, 0xffffffff);
126+
intel_uncore_posting_read(uncore, regs.emr);
127+
128+
intel_uncore_write(uncore, regs.eir, 0xffffffff);
129+
intel_uncore_posting_read(uncore, regs.eir);
130+
intel_uncore_write(uncore, regs.eir, 0xffffffff);
131+
intel_uncore_posting_read(uncore, regs.eir);
132+
}
133+
134+
void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
135+
u32 emr_val)
136+
{
137+
intel_uncore_write(uncore, regs.eir, 0xffffffff);
138+
intel_uncore_posting_read(uncore, regs.eir);
139+
intel_uncore_write(uncore, regs.eir, 0xffffffff);
140+
intel_uncore_posting_read(uncore, regs.eir);
141+
142+
intel_uncore_write(uncore, regs.emr, emr_val);
143+
intel_uncore_posting_read(uncore, regs.emr);
144+
}
145+
123146
/**
124147
* ivb_parity_work - Workqueue called when a parity error interrupt
125148
* occurred.
@@ -867,6 +890,7 @@ static void i915_irq_reset(struct drm_i915_private *dev_priv)
867890

868891
i9xx_display_irq_reset(dev_priv);
869892

893+
gen2_error_reset(uncore, GEN2_ERROR_REGS);
870894
gen2_irq_reset(uncore, GEN2_IRQ_REGS);
871895
dev_priv->irq_mask = ~0u;
872896
}
@@ -876,7 +900,7 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
876900
struct intel_uncore *uncore = &dev_priv->uncore;
877901
u32 enable_mask;
878902

879-
intel_uncore_write(uncore, EMR, i9xx_error_mask(dev_priv));
903+
gen2_error_init(uncore, GEN2_ERROR_REGS, i9xx_error_mask(dev_priv));
880904

881905
dev_priv->irq_mask =
882906
~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
@@ -972,6 +996,7 @@ static void i965_irq_reset(struct drm_i915_private *dev_priv)
972996

973997
i9xx_display_irq_reset(dev_priv);
974998

999+
gen2_error_reset(uncore, GEN2_ERROR_REGS);
9751000
gen2_irq_reset(uncore, GEN2_IRQ_REGS);
9761001
dev_priv->irq_mask = ~0u;
9771002
}
@@ -1000,7 +1025,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
10001025
struct intel_uncore *uncore = &dev_priv->uncore;
10011026
u32 enable_mask;
10021027

1003-
intel_uncore_write(uncore, EMR, i965_error_mask(dev_priv));
1028+
gen2_error_init(uncore, GEN2_ERROR_REGS, i965_error_mask(dev_priv));
10041029

10051030
dev_priv->irq_mask =
10061031
~(I915_ASLE_INTERRUPT |

‎drivers/gpu/drm/i915/i915_irq.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,4 +47,8 @@ void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs);
4747
void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
4848
u32 imr_val, u32 ier_val);
4949

50+
void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
51+
void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
52+
u32 emr_val);
53+
5054
#endif /* __I915_IRQ_H__ */

‎drivers/gpu/drm/i915/i915_reg.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -472,6 +472,9 @@
472472
#define GM45_ERROR_CP_PRIV (1 << 3)
473473
#define I915_ERROR_MEMORY_REFRESH (1 << 1)
474474
#define I915_ERROR_INSTRUCTION (1 << 0)
475+
476+
#define GEN2_ERROR_REGS I915_ERROR_REGS(EMR, EIR)
477+
475478
#define INSTPM _MMIO(0x20c0)
476479
#define INSTPM_SELF_EN (1 << 12) /* 915GM only */
477480
#define INSTPM_AGPBUSY_INT_EN (1 << 11) /* gen3: when disabled, pending interrupts

‎drivers/gpu/drm/i915/i915_reg_defs.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -294,4 +294,12 @@ struct i915_irq_regs {
294294
#define I915_IRQ_REGS(_imr, _ier, _iir) \
295295
((const struct i915_irq_regs){ .imr = (_imr), .ier = (_ier), .iir = (_iir) })
296296

297+
struct i915_error_regs {
298+
i915_reg_t emr;
299+
i915_reg_t eir;
300+
};
301+
302+
#define I915_ERROR_REGS(_emr, _eir) \
303+
((const struct i915_error_regs){ .emr = (_emr), .eir = (_eir) })
304+
297305
#endif /* __I915_REG_DEFS__ */

‎drivers/gpu/drm/xe/display/ext/i915_irq.c

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,29 @@ void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
5151
intel_uncore_posting_read(uncore, regs.imr);
5252
}
5353

54+
void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
55+
{
56+
intel_uncore_write(uncore, regs.emr, 0xffffffff);
57+
intel_uncore_posting_read(uncore, regs.emr);
58+
59+
intel_uncore_write(uncore, regs.eir, 0xffffffff);
60+
intel_uncore_posting_read(uncore, regs.eir);
61+
intel_uncore_write(uncore, regs.eir, 0xffffffff);
62+
intel_uncore_posting_read(uncore, regs.eir);
63+
}
64+
65+
void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
66+
u32 emr_val)
67+
{
68+
intel_uncore_write(uncore, regs.eir, 0xffffffff);
69+
intel_uncore_posting_read(uncore, regs.eir);
70+
intel_uncore_write(uncore, regs.eir, 0xffffffff);
71+
intel_uncore_posting_read(uncore, regs.eir);
72+
73+
intel_uncore_write(uncore, regs.emr, emr_val);
74+
intel_uncore_posting_read(uncore, regs.emr);
75+
}
76+
5477
bool intel_irqs_enabled(struct xe_device *xe)
5578
{
5679
return atomic_read(&xe->irq.enabled);

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