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clementlegerAlexandre Ghiti
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riscv: add parsing for Zaamo and Zalrsc extensions
These 2 new extensions are actually a subset of the A extension which provides atomic memory operations and load-reserved/store-conditional instructions. Signed-off-by: Clément Léger <cleger@rivosinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240619153913.867263-3-cleger@rivosinc.com Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
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arch/riscv/include/asm/hwcap.h

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@@ -103,6 +103,8 @@
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#define RISCV_ISA_EXT_ZFBFMIN 94
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#define RISCV_ISA_EXT_ZVFBFMIN 95
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#define RISCV_ISA_EXT_ZVFBFWMA 96
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#define RISCV_ISA_EXT_ZAAMO 97
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#define RISCV_ISA_EXT_ZALRSC 98
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#define RISCV_ISA_EXT_XLINUXENVCFG 127
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arch/riscv/kernel/cpufeature.c

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@@ -182,6 +182,11 @@ static int riscv_ext_svadu_validate(const struct riscv_isa_ext_data *data,
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return 0;
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}
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static const unsigned int riscv_a_exts[] = {
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RISCV_ISA_EXT_ZAAMO,
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RISCV_ISA_EXT_ZALRSC,
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};
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static const unsigned int riscv_zk_bundled_exts[] = {
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RISCV_ISA_EXT_ZBKB,
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RISCV_ISA_EXT_ZBKC,
@@ -353,7 +358,7 @@ static const unsigned int riscv_c_exts[] = {
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const struct riscv_isa_ext_data riscv_isa_ext[] = {
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__RISCV_ISA_EXT_DATA(i, RISCV_ISA_EXT_i),
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__RISCV_ISA_EXT_DATA(m, RISCV_ISA_EXT_m),
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__RISCV_ISA_EXT_DATA(a, RISCV_ISA_EXT_a),
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__RISCV_ISA_EXT_SUPERSET(a, RISCV_ISA_EXT_a, riscv_a_exts),
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__RISCV_ISA_EXT_DATA(f, RISCV_ISA_EXT_f),
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__RISCV_ISA_EXT_DATA(d, RISCV_ISA_EXT_d),
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__RISCV_ISA_EXT_DATA(q, RISCV_ISA_EXT_q),
@@ -373,8 +378,10 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
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__RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
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__RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM),
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__RISCV_ISA_EXT_DATA(zimop, RISCV_ISA_EXT_ZIMOP),
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__RISCV_ISA_EXT_DATA(zaamo, RISCV_ISA_EXT_ZAAMO),
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__RISCV_ISA_EXT_DATA(zabha, RISCV_ISA_EXT_ZABHA),
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__RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS),
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__RISCV_ISA_EXT_DATA(zalrsc, RISCV_ISA_EXT_ZALRSC),
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__RISCV_ISA_EXT_DATA(zawrs, RISCV_ISA_EXT_ZAWRS),
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__RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA),
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__RISCV_ISA_EXT_DATA_VALIDATE(zfbfmin, RISCV_ISA_EXT_ZFBFMIN, riscv_ext_f_depends),

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