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Santhosh Kumar Kbroonie
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spi: cadence-quadspi: Enable SPI_TX_QUAD
Enable the SPI_TX_QUAD mode bit in the host->mode_bits to support data transmission over four lines to improve the performance. Tested the functionality on AM62Lx EVM (W25N01JW) in 1S-4S-4S mode. Signed-off-by: Santhosh Kumar K <s-k6@ti.com> Link: https://patch.msgid.link/20250102120544.1407152-1-s-k6@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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drivers/spi/spi-cadence-quadspi.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,7 @@ static_assert(CQSPI_MAX_CHIPSELECT <= SPI_CS_CNT_MAX);
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/* Capabilities */
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#define CQSPI_SUPPORTS_OCTAL BIT(0)
52+
#define CQSPI_SUPPORTS_QUAD BIT(1)
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#define CQSPI_OP_WIDTH(part) ((part).nbytes ? ilog2((part).buswidth) : 0)
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@@ -1888,6 +1889,8 @@ static int cqspi_probe(struct platform_device *pdev)
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cqspi->master_ref_clk_hz);
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if (ddata->hwcaps_mask & CQSPI_SUPPORTS_OCTAL)
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host->mode_bits |= SPI_RX_OCTAL | SPI_TX_OCTAL;
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if (ddata->hwcaps_mask & CQSPI_SUPPORTS_QUAD)
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host->mode_bits |= SPI_TX_QUAD;
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if (!(ddata->quirks & CQSPI_DISABLE_DAC_MODE)) {
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cqspi->use_direct_mode = true;
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cqspi->use_direct_mode_wr = true;
@@ -2062,7 +2065,7 @@ static const struct cqspi_driver_platdata k2g_qspi = {
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};
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static const struct cqspi_driver_platdata am654_ospi = {
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.hwcaps_mask = CQSPI_SUPPORTS_OCTAL,
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.hwcaps_mask = CQSPI_SUPPORTS_OCTAL | CQSPI_SUPPORTS_QUAD,
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.quirks = CQSPI_NEEDS_WR_DELAY,
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};
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