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Merge tag 'media/v6.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media updates from Mauro Carvalho Chehab: - platform: synopsys: hdmirx: Fix 64-bit division for 32-bit targets - vim2m: print device name after registering device - Synopsys DesignWare HDMI RX Driver and various fixes - cec/printk fixes and the removal of the vidioc_g/s_ctrl and vidioc_queryctrl callbacks - AVerMedia H789-C PCIe support and rc-core structs padding - Several camera sensor patches - uvcvideo improvements - visl: Fix ERANGE error when setting enum controls - codec fixes - V4L2 camera sensor patches mostly - chips-media: wave5: Fixes - Add SDM670 camera subsystem - Qualcomm iris video decoder driver - dt-bindings: update clocks for sc7280-camss - various fixes and enhancements * tag 'media/v6.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (264 commits) media: pci: mgb4: include linux/errno.h media: synopsys: hdmirx: Fix signedness bug in hdmirx_parse_dt() media: platform: synopsys: hdmirx: Fix 64-bit division for 32-bit targets media: vim2m: print device name after registering device media: vivid: Introduce VIDEO_VIVID_OSD media: vivid: Move all fb_info references into vivid-osd media: platform: synopsys: hdmirx: Optimize struct snps_hdmirx_dev media: platform: synopsys: hdmirx: Remove unused HDMI audio CODEC relics media: platform: synopsys: hdmirx: Remove duplicated header inclusion media: qcom: Clean up Kconfig dependencies media: dvb-frontends: tda10048: Make the range of z explicit. media: platform: stm32: Add check for clk_enable() media: xilinx-tpg: fix double put in xtpg_parse_of() media: siano: Fix error handling in smsdvb_module_init() media: c8sectpfe: Call of_node_put(i2c_bus) only once in c8sectpfe_probe() media: i2c: tda1997x: Call of_node_put(ep) only once in tda1997x_parse_dt() dt-bindings: media: mediatek,vcodec: Revise description dt-bindings: media: mediatek,jpeg: Relax IOMMU max item count media: v4l2-dv-timings: prevent possible overflow in v4l2_detect_gtf() media: rockchip: rga: fix rga offset lookup ...
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Documentation/admin-guide/media/cec.rst

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@@ -451,7 +451,7 @@ configure the CEC devices for HDMI Input and the HDMI Outputs manually.
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---------------------
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A three character manufacturer name that is used in the EDID for the HDMI
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Input. If not set, then userspace is reponsible for configuring an EDID.
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Input. If not set, then userspace is responsible for configuring an EDID.
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If set, then the driver will update the EDID automatically based on the
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resolutions supported by the connected displays, and it will not be possible
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anymore to manually set the EDID for the HDMI Input.

Documentation/admin-guide/media/mgb4.rst

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@@ -22,7 +22,9 @@ Global (PCI card) parameters
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| 0 - No module present
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| 1 - FPDL3
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| 2 - GMSL
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| 2 - GMSL (one serializer, two daisy chained deserializers)
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| 3 - GMSL (one serializer, two deserializers)
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| 4 - GMSL (two deserializers with two daisy chain outputs)
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**module_version** (R):
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Module version number. Zero in case of a missing module.
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/aspeed,video-engine.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ASPEED Video Engine
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maintainers:
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- Eddie James <eajames@linux.ibm.com>
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description:
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The Video Engine (VE) embedded in the ASPEED SOCs can be configured to
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capture and compress video data from digital or analog sources.
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properties:
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compatible:
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enum:
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- aspeed,ast2400-video-engine
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- aspeed,ast2500-video-engine
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- aspeed,ast2600-video-engine
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reg:
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maxItems: 1
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: vclk
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- const: eclk
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resets:
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maxItems: 1
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interrupts:
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maxItems: 1
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memory-region:
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maxItems: 1
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description: |
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Phandle to the reserved memory nodes to be associated with the
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VE. VE will acquires memory space for 3 purposes:
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1. JPEG header
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2. Compressed result
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3. Temporary transformed image data
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/ast2600-clock.h>
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video@1e700000 {
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compatible = "aspeed,ast2600-video-engine";
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reg = <0x1e700000 0x1000>;
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clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
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<&syscon ASPEED_CLK_GATE_ECLK>;
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clock-names = "vclk", "eclk";
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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};

Documentation/devicetree/bindings/media/aspeed-video.txt

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Documentation/devicetree/bindings/media/i2c/adv7180.yaml

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Indicates that the output is a BT.656-4 compatible stream.
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type: boolean
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interrupts:
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items:
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- description: The GPIO connected to the INTRQ pin.
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port:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false

Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml

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description:
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Any lane can be inverted or not.
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minItems: 1
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maxItems: 2
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maxItems: 3
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required:
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- data-lanes

Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml

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$id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek Video Decode Accelerator With Multi Hardware
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title: MediaTek Video Decode Accelerator With Multi Hardware
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maintainers:
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- Yunfei Dong <yunfei.dong@mediatek.com>
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description: |
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Mediatek Video Decode is the video decode hardware present in Mediatek
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SoCs which supports high resolution decoding functionalities. Required
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parent and child device node.
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About the Decoder Hardware Block Diagram, please check below:
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+------------------------------------------------+-------------------------------------+
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| | |
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| input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output |
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| || || | || |
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+------------||-------------||-------------------+---------------------||--------------+
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|| lat || | core workqueue <parent>
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-------------||-------------||-------------------|---------------------||---------------
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||<------------||----------------HW index---------------->|| <child>
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\/ \/ \/
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+-------------------------------------------------------------+
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| enable/disable |
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| clk power irq iommu |
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| (lat/lat soc/core0/core1) |
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+-------------------------------------------------------------+
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As above, there are parent and child devices, child mean each hardware. The child device
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controls the information of each hardware independent which include clk/power/irq.
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There are two workqueues in parent device: lat workqueue and core workqueue. They are used
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to lat and core hardware decoder. Lat workqueue need to get input bitstream and lat buffer,
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then enable lat to decode, writing the result to lat buffer, dislabe hardware when lat decode
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done. Core workqueue need to get lat buffer and output buffer, then enable core to decode,
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writing the result to output buffer, disable hardware when core decode done. These two
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hardwares will decode each frame cyclically.
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For the smi common may not the same for each hardware, can't combine all hardware in one node,
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or leading to iommu fault when access dram data.
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Lat soc is a hardware which is related with some larb(local arbiter) ports. For mt8195
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platform, there are some ports like RDMA, UFO in lat soc larb, need to enable its power and
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clock when lat start to work, don't have interrupt.
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mt8195: lat soc HW + lat HW + core HW
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mt8192: lat HW + core HW
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MediaTek Video Decode Accelerator is the video decoding hardware present in
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MediaTek SoCs that supports high-resolution decoding functionalities.
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It consists of parent and child nodes.
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The decoder hardware block diagram is shown below:
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+------------------------------------------------+------------------------------+
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| | |
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| input -> LAT-SoC HW -> LAT HW -> LAT buffer --|--> Core HW -> output buffer |
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| || || | || |
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+--------------||-----------||-------------------+-------||---------------------+
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LAT Workqueue | Core Workqueue <parent>
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---------------||-----------||-------------------|-------||----------------------
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||<----------||---------HW index--------->|| <child>
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\/ \/ \/
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+-------------------------------------------------------------+
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| enable/disable |
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| clk power irq iommu |
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| (lat/lat-soc/core0/core1) |
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+-------------------------------------------------------------+
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The child nodes represent the individual hardware blocks within the decoding
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pipeline, such as LAT-SoC, LAT and Core.
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Each child node is responsible for managing the dedicated resources of the
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hardware, such as clocks, power domains, interrupts and IOMMUs.
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The parent node is a central point of control for the child nodes.
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It identifies the specific video decoding pipeline architecture used by the
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SoC, manages the shared resources like workqueues and platform data, and
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handles V4L2 API calls on behalf of the underlying hardware.
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The parent utilizes two workqueues to manage the decoding process.
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1. LAT Workqueue, for LAT-SoC and LAT decoder:
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Its workers take input bitstream and LAT buffer, enable the hardware for
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decoding tasks, write the result to LAT buffer, and disable the hardware
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after the LAT decoding is done.
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2. Core Workqueue, for Core decoder:
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Its workers take LAT buffer and output buffer, enable the hardware for
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decoding tasks, write the result to output buffer, and disable the hardware
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after the Core decoding is done.
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These hardware decode each frame cyclically.
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The hardware might be associated with different SMI-common devices.
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To prevent IOMMU faults during DRAM access in such cases, each hardware with
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the unique SMI-common device must be placed under a separate parent node in
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the device tree.
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LAT-SoC refers to another hardware block that connected to additional LARB
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(local arbiter) ports, such as RDMA and UFO.
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It requires independent power and clock control to work with LAT decoder, and
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it doesn't have a dedicated interrupt.
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The used video decoding pipeline architecture across various Mediatek SoC:
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MT8195: LAT-SoC + LAT + Core
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MT8192: LAT + Core
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MT8188: LAT + Core
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MT8186: Core
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properties:
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compatible:

Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml

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maxItems: 1
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iommus:
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maxItems: 2
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minItems: 2
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maxItems: 32
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description: |
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Points to the respective IOMMU block with master port as argument, see
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Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.

Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml

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iommus:
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minItems: 2
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maxItems: 4
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maxItems: 32
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description: |
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Points to the respective IOMMU block with master port as argument, see
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Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.

Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml

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- const: csiphy3_timer
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- const: csiphy4
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- const: csiphy4_timer
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- const: gcc_camera_ahb
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- const: gcc_cam_hf_axi
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- const: gcc_axi_hf
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- const: gcc_axi_sf
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- const: icp_ahb
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- const: vfe0
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- const: vfe0_axi
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<&camcc CAM_CC_CSI3PHYTIMER_CLK>,
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<&camcc CAM_CC_CSIPHY4_CLK>,
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<&camcc CAM_CC_CSI4PHYTIMER_CLK>,
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<&gcc GCC_CAMERA_AHB_CLK>,
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<&gcc GCC_CAMERA_HF_AXI_CLK>,
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<&gcc GCC_CAMERA_SF_AXI_CLK>,
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<&camcc CAM_CC_ICP_AHB_CLK>,
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<&camcc CAM_CC_IFE_0_CLK>,
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<&camcc CAM_CC_IFE_0_AXI_CLK>,
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"csiphy3_timer",
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"csiphy4",
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"csiphy4_timer",
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"gcc_camera_ahb",
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"gcc_cam_hf_axi",
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"gcc_axi_hf",
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"gcc_axi_sf",
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"icp_ahb",
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"vfe0",
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"vfe0_axi",

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