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spi: dt-bindings: apple,spi: Add binding for Apple SPI controllers
The Apple SPI controller is present in SoCs such as the M1 (t8103) and M1 Pro/Max (t600x). This controller uses one IRQ and one clock, and doesn't need any special properties, so the binding is trivial. Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Nick Chan <towinchenmi@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Link: https://patch.msgid.link/20241106-asahi-spi-v5-1-e81a4f3a8e19@jannau.net Signed-off-by: Mark Brown <broonie@kernel.org>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/apple,spi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Apple ARM SoC SPI controller
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allOf:
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- $ref: spi-controller.yaml#
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maintainers:
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- Hector Martin <marcan@marcan.st>
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properties:
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compatible:
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items:
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- enum:
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- apple,t8103-spi
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- apple,t8112-spi
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- apple,t6000-spi
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- const: apple,spi
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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interrupts:
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maxItems: 1
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/apple-aic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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spi@39b104000 {
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compatible = "apple,t6000-spi", "apple,spi";
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reg = <0x3 0x9b104000 0x0 0x4000>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 0 1107 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clk>;
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};
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};

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