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169 | 169 | interrupts = <3>;
|
170 | 170 | };
|
171 | 171 |
|
| 172 | + pwm@1ff5c000 { |
| 173 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 174 | + reg = <0x0 0x1ff5c000 0x0 0x10>; |
| 175 | + interrupt-parent = <&liointc0>; |
| 176 | + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; |
| 177 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 178 | + #pwm-cells = <3>; |
| 179 | + status = "disabled"; |
| 180 | + }; |
| 181 | + |
| 182 | + pwm@1ff5c010 { |
| 183 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 184 | + reg = <0x0 0x1ff5c010 0x0 0x10>; |
| 185 | + interrupt-parent = <&liointc0>; |
| 186 | + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; |
| 187 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 188 | + #pwm-cells = <3>; |
| 189 | + status = "disabled"; |
| 190 | + }; |
| 191 | + |
| 192 | + pwm@1ff5c020 { |
| 193 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 194 | + reg = <0x0 0x1ff5c020 0x0 0x10>; |
| 195 | + interrupt-parent = <&liointc0>; |
| 196 | + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; |
| 197 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 198 | + #pwm-cells = <3>; |
| 199 | + status = "disabled"; |
| 200 | + }; |
| 201 | + |
| 202 | + pwm@1ff5c030 { |
| 203 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 204 | + reg = <0x0 0x1ff5c030 0x0 0x10>; |
| 205 | + interrupt-parent = <&liointc0>; |
| 206 | + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; |
| 207 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 208 | + #pwm-cells = <3>; |
| 209 | + status = "disabled"; |
| 210 | + }; |
| 211 | + |
| 212 | + pwm@1ff5c040 { |
| 213 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 214 | + reg = <0x0 0x1ff5c040 0x0 0x10>; |
| 215 | + interrupt-parent = <&liointc0>; |
| 216 | + interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; |
| 217 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 218 | + #pwm-cells = <3>; |
| 219 | + status = "disabled"; |
| 220 | + }; |
| 221 | + |
| 222 | + pwm@1ff5c050 { |
| 223 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 224 | + reg = <0x0 0x1ff5c050 0x0 0x10>; |
| 225 | + interrupt-parent = <&liointc0>; |
| 226 | + interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; |
| 227 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 228 | + #pwm-cells = <3>; |
| 229 | + status = "disabled"; |
| 230 | + }; |
| 231 | + |
| 232 | + pwm@1ff5c060 { |
| 233 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 234 | + reg = <0x0 0x1ff5c060 0x0 0x10>; |
| 235 | + interrupt-parent = <&liointc0>; |
| 236 | + interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; |
| 237 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 238 | + #pwm-cells = <3>; |
| 239 | + status = "disabled"; |
| 240 | + }; |
| 241 | + |
| 242 | + pwm@1ff5c070 { |
| 243 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 244 | + reg = <0x0 0x1ff5c070 0x0 0x10>; |
| 245 | + interrupt-parent = <&liointc0>; |
| 246 | + interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; |
| 247 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 248 | + #pwm-cells = <3>; |
| 249 | + status = "disabled"; |
| 250 | + }; |
| 251 | + |
| 252 | + pwm@1ff5c080 { |
| 253 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 254 | + reg = <0x0 0x1ff5c080 0x0 0x10>; |
| 255 | + interrupt-parent = <&liointc0>; |
| 256 | + interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; |
| 257 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 258 | + #pwm-cells = <3>; |
| 259 | + status = "disabled"; |
| 260 | + }; |
| 261 | + |
| 262 | + pwm@1ff5c090 { |
| 263 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 264 | + reg = <0x0 0x1ff5c090 0x0 0x10>; |
| 265 | + interrupt-parent = <&liointc0>; |
| 266 | + interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; |
| 267 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 268 | + #pwm-cells = <3>; |
| 269 | + status = "disabled"; |
| 270 | + }; |
| 271 | + |
| 272 | + pwm@1ff5c0a0 { |
| 273 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 274 | + reg = <0x0 0x1ff5c0a0 0x0 0x10>; |
| 275 | + interrupt-parent = <&liointc0>; |
| 276 | + interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; |
| 277 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 278 | + #pwm-cells = <3>; |
| 279 | + status = "disabled"; |
| 280 | + }; |
| 281 | + |
| 282 | + pwm@1ff5c0b0 { |
| 283 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 284 | + reg = <0x0 0x1ff5c0b0 0x0 0x10>; |
| 285 | + interrupt-parent = <&liointc0>; |
| 286 | + interrupts = <26 IRQ_TYPE_LEVEL_HIGH>; |
| 287 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 288 | + #pwm-cells = <3>; |
| 289 | + status = "disabled"; |
| 290 | + }; |
| 291 | + |
| 292 | + pwm@1ff5c0c0 { |
| 293 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 294 | + reg = <0x0 0x1ff5c0c0 0x0 0x10>; |
| 295 | + interrupt-parent = <&liointc0>; |
| 296 | + interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; |
| 297 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 298 | + #pwm-cells = <3>; |
| 299 | + status = "disabled"; |
| 300 | + }; |
| 301 | + |
| 302 | + pwm@1ff5c0d0 { |
| 303 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 304 | + reg = <0x0 0x1ff5c0d0 0x0 0x10>; |
| 305 | + interrupt-parent = <&liointc0>; |
| 306 | + interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; |
| 307 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 308 | + #pwm-cells = <3>; |
| 309 | + status = "disabled"; |
| 310 | + }; |
| 311 | + |
| 312 | + pwm@1ff5c0e0 { |
| 313 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 314 | + reg = <0x0 0x1ff5c0e0 0x0 0x10>; |
| 315 | + interrupt-parent = <&liointc0>; |
| 316 | + interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; |
| 317 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 318 | + #pwm-cells = <3>; |
| 319 | + status = "disabled"; |
| 320 | + }; |
| 321 | + |
| 322 | + pwm@1ff5c0f0 { |
| 323 | + compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm"; |
| 324 | + reg = <0x0 0x1ff5c0f0 0x0 0x10>; |
| 325 | + interrupt-parent = <&liointc0>; |
| 326 | + interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; |
| 327 | + clocks = <&clk LOONGSON2_APB_CLK>; |
| 328 | + #pwm-cells = <3>; |
| 329 | + status = "disabled"; |
| 330 | + }; |
| 331 | + |
172 | 332 | gmac0: ethernet@1f020000 {
|
173 | 333 | compatible = "snps,dwmac-3.70a";
|
174 | 334 | reg = <0x0 0x1f020000 0x0 0x10000>;
|
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