Expose logic port pins, combine measurements, move port detection function to lib

Author: hdoordt

cli/Cargo.toml

@@ -9,7 +9,6 @@ authors = ["Henk Oordt <hd@oordt.dev>"]
 [dependencies]
 anyhow = { version = "1.0.60", features = ["backtrace"] }
 ctrlc = "3.2.2"
-serialport = "4.2.0"
 tracing = "0.1.36"
 tracing-subscriber = "0.3.15"
 clap = { version = "3.2.20", features = ["derive", "env"] }

cli/src/main.rs

@@ -2,15 +2,14 @@ use anyhow::Result;
 use clap::Parser;
 use ppk2::{
     types::{DevicePower, MeasurementMode, SourceVoltage},
-    Error, Ppk2,
+    Ppk2, try_find_ppk2_port,
 };
-use serialport::SerialPortType::UsbPort;
+
 use std::{
-    collections::VecDeque,
     sync::mpsc::RecvTimeoutError,
     time::{Duration, Instant},
 };
-use tracing::{debug, error, info, warn, Level};
+use tracing::{debug, error, info, Level};
 use tracing_subscriber::FmtSubscriber;
 
 #[derive(Parser)]
@@ -113,15 +112,3 @@ fn main() -> Result<()> {
     info!("Goodbye!");
     r
 }
-
-/// Try to find the serial port the PPK2 is connected to.
-fn try_find_ppk2_port() -> Result<String> {
-    Ok(serialport::available_ports()?
-        .into_iter()
-        .find(|p| match &p.port_type {
-            UsbPort(usb) => usb.vid == 0x1915 && usb.pid == 0xc00a,
-            _ => false,
-        })
-        .ok_or(Error::Ppk2NotFound)?
-        .port_name)
-}

ppk2/src/lib.rs

@@ -1,7 +1,7 @@
 #![doc = include_str!("../../README.md")]
 #![deny(missing_docs)]
 
-use measurement::{Measurement, MeasurementAccumulator};
+use measurement::{Measurement, MeasurementAccumulator, MeasurementIterExt};
 use serialport::{ClearBuffer::Input, FlowControl, SerialPort};
 use std::str::Utf8Error;
 use std::sync::mpsc::{self, Receiver, SendError, TryRecvError};
@@ -155,9 +155,8 @@ impl Ppk2 {
                     missed += accumulator.feed_into(&buf[..n], &mut measurement_buf);
                     let len = measurement_buf.len();
                     if len >= SPS_MAX / sps {
-                        let sum: f32 = measurement_buf.drain(..).map(|m| m.micro_amps).sum();
-                        let avg = sum / (len - missed) as f32;
-                        meas_tx.send(Measurement { micro_amps: avg })?;
+                        let measurement = measurement_buf.drain(..).combine(missed);                        
+                        meas_tx.send(measurement)?;
                         missed = 0;
                     }
                 }
@@ -198,3 +197,17 @@ impl Ppk2 {
         Ok(())
     }
 }
+
+/// Try to find the serial port the PPK2 is connected to.
+pub fn try_find_ppk2_port() -> Result<String> {
+    use serialport::SerialPortType::UsbPort;
+
+    Ok(serialport::available_ports()?
+        .into_iter()
+        .find(|p| match &p.port_type {
+            UsbPort(usb) => usb.vid == 0x1915 && usb.pid == 0xc00a,
+            _ => false,
+        })
+        .ok_or(Error::Ppk2NotFound)?
+        .port_name)
+}

ppk2/src/measurement.rs

@@ -2,7 +2,7 @@
 
 use std::collections::VecDeque;
 
-use crate::types::Metadata;
+use crate::types::{Metadata, LogicPortPins};
 
 const ADC_MULTIPLIER: f32 = 1.8 / 163840.;
 const SPIKE_FILTER_ALPHA: f32 = 0.18;
@@ -14,6 +14,8 @@ const SPIKE_FILTER_SAMPLES: isize = 3;
 pub struct Measurement {
     /// The measured current in mA.
     pub micro_amps: f32,
+    /// Logic port bits
+    pub pins: LogicPortPins,
 }
 
 struct AccumulatorState {
@@ -84,7 +86,7 @@ impl MeasurementAccumulator {
             }
 
             let adc_result = get_adc(raw) * 4;
-            let _bits = get_logic(raw);
+            let bits = get_logic(raw).into();
             let micro_amps = get_adc_result(
                 &self.metadata,
                 &mut self.state,
@@ -95,7 +97,7 @@ impl MeasurementAccumulator {
                 self.state.expected_counter.replace(counter);
             }
 
-            buf.push_back(Measurement { micro_amps })
+            buf.push_back(Measurement { micro_amps, pins: bits })
         }
         self.buf.drain(..end);
         samples_missed
@@ -160,6 +162,43 @@ fn get_adc_result(
     adc
 }
 
+/// Extension trait for VecDeque<Measurement>
+pub trait MeasurementIterExt {
+    /// Combine items into a single [Measurement]. T
+    fn combine(self, missed: usize) -> Measurement;
+}
+
+impl<I: Iterator<Item = Measurement>> MeasurementIterExt for I {
+    fn combine(self, missed: usize) -> Measurement {
+        let mut pin_high_count = [0usize; 8];
+        let mut count = 0;
+        let mut sum = 0f32;
+        self.for_each(|m| {
+            count += 1;
+            sum += m.micro_amps;
+            m.pins
+                .inner()
+                .iter()
+                .enumerate()
+                .filter(|(_, &p)| p)
+                .for_each(|(i, _)| pin_high_count[i] += 1);
+        });
+
+        let mut pins = [false; 8];
+        pin_high_count
+            .into_iter()
+            .enumerate()
+            .filter(|(_, p)| *p > count / 2)
+            .for_each(|(i, _)| pins[i] = true);
+        let avg = sum / (count - missed) as f32;
+
+        Measurement {
+            micro_amps: avg,
+            pins: pins.into(),
+        }
+    }
+}
+
 const fn generate_mask(bits: u32, pos: u32) -> u32 {
     (2u32.pow(bits as u32) - 1) << pos
 }

ppk2/src/types.rs

@@ -136,6 +136,52 @@ impl FromStr for DevicePower {
     }
 }
 
+/// Logic port state
+#[derive(Debug, Clone, Copy)]
+pub struct LogicPortPins {
+    pins: [bool; 8],
+}
+
+impl LogicPortPins {
+    /// Check whether a pin level is high
+    pub fn pin_is_high(&self, pin: usize) -> bool {
+        assert!(pin < 8);
+        self.pins[pin]
+    }
+
+    /// Check whether a pin level is low
+    pub fn pin_is_low(&self, pin: usize) -> bool {
+        !self.pin_is_high(pin)
+    }
+
+    /// Get a reference to the internal pin array
+    pub fn inner(&self) -> &[bool; 8] {
+        &self.pins
+    }
+}
+
+impl From<[bool; 8]> for LogicPortPins {
+    fn from(pins: [bool; 8]) -> Self {
+        Self { pins }
+    }
+}
+
+impl From<u8> for LogicPortPins {
+    fn from(inner: u8) -> Self {
+        let mut pins = [false; 8];
+        for (i, pin) in pins.iter_mut().enumerate() {
+            *pin = inner & 1 << i != 0
+        }
+        pins.into()
+    }
+}
+
+impl From<u32> for LogicPortPins {
+    fn from(v: u32) -> Self {
+        (v as u8).into()
+    }
+}
+
 #[derive(Default, Debug, Clone, PartialEq)]
 /// parsed device metadata
 pub struct Metadata {