Merge branch 'master' of https://github.com/grumpycoders/pcsx-redux into delay-slot-mask

Author: nicolasnoble

src/core/r3000a.cc

@@ -97,20 +97,6 @@ void PCSX::R3000Acpu::psxException(uint32_t code, bool bd) {
 }
 
 void PCSX::R3000Acpu::psxBranchTest() {
-    // GameShark Sampler: Give VSync pin some delay before exception eats it
-    if (psxHu32(0x1070) & psxHu32(0x1074)) {
-        if ((m_psxRegs.CP0.n.Status & 0x401) == 0x401) {
-            uint32_t opcode;
-
-            // Crash Bandicoot 2: Don't run exceptions when GTE in pipeline
-            opcode = SWAP_LE32(*Read_ICache(m_psxRegs.pc, true));
-            if (((opcode >> 24) & 0xfe) != 0x4a) {
-                PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
-                psxException(0x400, 0);
-            }
-        }
-    }
-
 #if 0
     if( SPU_async )
     {
@@ -228,6 +214,18 @@ void PCSX::R3000Acpu::psxBranchTest() {
             }
         }
     }
+    if (psxHu32(0x1070) & psxHu32(0x1074)) {
+        if ((m_psxRegs.CP0.n.Status & 0x401) == 0x401) {
+            uint32_t opcode;
+
+            // Crash Bandicoot 2: Don't run exceptions when GTE in pipeline
+            opcode = SWAP_LE32(*Read_ICache(m_psxRegs.pc, true));
+            if (((opcode >> 24) & 0xfe) != 0x4a) {
+                PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
+                psxException(0x400, 0);
+            }
+        }
+    }
 }
 
 void PCSX::R3000Acpu::psxSetPGXPMode(uint32_t pgxpMode) {

src/core/r3000a.h

@@ -251,8 +251,24 @@ typedef struct {
 #define _JumpTarget_ ((_Target_ * 4) + (_PC_ & 0xf0000000))  // Calculates the target during a jump instruction
 #define _BranchTarget_ ((int16_t)_Im_ * 4 + _PC_)            // Calculates the target during a branch instruction
 
-#define _SetLink(x) \
-    PCSX::g_emulator.m_psxCpu->m_psxRegs.GPR.r[x] = _PC_ + 4  // Sets the return address in the link register
+/*
+The "SetLink" mechanism uses the delay slot. This may sound counter intuitive, but this is the only way to
+properly handle this specific sequence of instructions:
+
+    beq someFalseCondition, out
+    lw  $ra, someOffset($sp)
+    jal someFunction
+    nop
+    [...]
+out:
+    jr  $ra
+    nop
+
+Without the change, the lw $ra will apply itself after jal happens, thus overriding the value the jal will
+have loaded into this register. This probably means this is also how the real CPU handles this, otherwise,
+this wouldn't work at all.
+*/
+#define _SetLink(x) delayedLoad(x, _PC_ + 4);  // Sets the return address in the link register
 
 class R3000Acpu {
   public: