Alternative serial I/O stuff.

Author: asmblur

src/mips/ps1sdk/include/serialio.h

@@ -135,6 +135,9 @@ void sio_clear_error(void);
 void sio_reset_driver(void);
 void init_sio(uint32_t baud);
 
+uint8_t sio_get_byte(void);
+void sio_put_byte(uint8_t d);
+
 //~ void sio_init(int port_no, int baud);
 
 //~ int sio_reset(int port_no);

src/mips/sioload/src/main.c

@@ -25,6 +25,17 @@
 
 #include "common/hardware/cop0.h"
 
+// switch between implementations
+#if 1
+#define SIO_PEEK8() sio_get_byte()
+#define SIO_POKE8(__d) sio_put_byte(__d)
+#else
+#define SIO_PEEK8() sio_peek8(0)
+#define SIO_POKE8(__d) sio_poke8(__d, 0)
+#endif
+
+#define SIO_PEEK32() (((SIO_PEEK8() | (SIO_PEEK8() << 8) | (SIO_PEEK8() << 16) | (SIO_PEEK8() << 24))
+
 void sioload(void) {
     int i;
     int sync;
@@ -35,24 +46,24 @@ void sioload(void) {
         write_addr, n_load;
 
     while (1) {
-        sio_poke8('X', 0);  // sends an X to pc
+        SIO_POKE8('X');  // sends an X to pc
     }
 
     do {
-        sync = sio_peek8(10000);
+        sync = SIO_PEEK8();
     } while (sync != 99);
 
     for (i = 0; i < sizeof(header_buf); i++) {
-        header_buf[i] = sio_peek8(0);
+        header_buf[i] = SIO_PEEK8();
     }
 
     // ignored
-    x_addr = sio_peek32(0);
-    write_addr = sio_peek32(0);
-    n_load = sio_peek32(0);
+    x_addr = SIO_PEEK32();
+    write_addr = SIO_PEEK32();
+    n_load = SIO_PEEK32();
 
     for (i = 0; i < n_load; i++) {
-        ((uint8_t*)write_addr)[i] = sio_peek8(0);
+        ((uint8_t*)write_addr)[i] = SIO_PEEK8();
     }
 
     // could at least send back a kiss goodbye...

src/mips/sioload/src/serialio.c

@@ -32,9 +32,6 @@ typedef struct {
 static port_config_t config = {0, 0, 0, 0};
 
 #define SIO1_BAUD_DIV (2073600)
-// I don't understand this... PsyQ says "bps must be in the range 9600 - 2073600 and evenly divisible into 2073600"
-// but reversing libsio shows 2116800 being divided by baud, not 2073600??
-//#define SIO1_BAUD_DIV (2116800)
 
 static inline void sio_set_ctrl_m(uint16_t mask, uint16_t ctrl) {
     *R_PS1_SIO1_CTRL = ((*R_PS1_SIO1_CTRL) & mask) | ctrl;
@@ -79,7 +76,7 @@ static inline uint16_t sio_get_ctrl(void) {
 
 static inline uint16_t sio_get_mode(void) { return *R_PS1_SIO1_MODE & 0x1FFF; }
 
-static inline uint16_t sio_get_baud(void) { return SIO1_BAUD_DIV / (*R_PS1_SIO1_BAUD); }
+static inline uint32_t sio_get_baud(void) { return SIO1_BAUD_DIV / (*R_PS1_SIO1_BAUD); }
 
 void sio_reset(void) { *R_PS1_SIO1_CTRL = SIO_CTRL_RESET_INT | SIO_CTRL_RESET_ERR; }
 
@@ -99,7 +96,7 @@ int sio_peek8(uint32_t timeout) {
 
     // this may not be necessary. Some UARTs won't transfer if yout don't though.
 
-    // assert RTR(Ready To Receive akia "RTS"/Request to Send)
+    // RTR(Ready To Receive akia "RTS"/Request to Send): on
     sio_set_ctrl_m(~(SIO_CTRL_RTR_EN), SIO_CTRL_RTR_EN);
 
     // wait for data in the RX FIFO
@@ -118,7 +115,7 @@ int sio_peek8(uint32_t timeout) {
     ret = *R_PS1_SIO1_DATA;
 
 _done:
-    // deassert RTR
+    // RTR/RTS: off
     sio_set_ctrl_m(~(SIO_CTRL_RTR_EN), 0);
 
     return ret;
@@ -141,7 +138,6 @@ uint32_t sio_peek32(uint32_t timeout) {
 }
 
 // FIXME: add sio_poke16 and 32
-
 int sio_poke8(uint8_t data, uint32_t timeout) {
     volatile uint8_t d;
 
@@ -183,6 +179,33 @@ int sio_poke8(uint8_t data, uint32_t timeout) {
     return data;
 }
 
+uint8_t sio_get_byte(void) {
+    uint8_t t ret;
+
+    // RTR(Ready To Receive akia "RTS"/Request to Send): on
+    sio_set_ctrl_m(~(SIO_CTRL_RTR_EN), SIO_CTRL_RTR_EN);
+
+    // wait for data in the RX FIFO
+
+    while (!(sio_get_stat() & SIO_STAT_RX_RDY))
+        ;
+
+    // pop a byte from the RX FIFO
+    ret = *R_PS1_SIO1_DATA;
+
+_done:
+    // RTR/RTS: off
+    sio_set_ctrl_m(~(SIO_CTRL_RTR_EN), 0);
+
+    return ret;
+}
+
+void sio_put_byte(uint8_t d) {
+    while ((sio_get_stat() & (SR_TXU | SR_TXRDY)) != (SR_TXU | SR_TXRDY))
+        ;
+    *R_PS1_SIO1_DATA = d;
+}
+
 void init_sio(uint32_t baud) {
     /* 8bit, no-parity, 1 stop-bit */
     sio_put_mode(SIO_MODE_CHLEN_8 | SIO_MODE_P_NONE | SIO_MODE_SB_1);