Merge pull request #1828 from nicolasnoble/lwc2-swc2

Accounting for GTE's LWC2/SWC2 in debugger.

Author: nicolasnoble

src/core/debug.cc

@@ -111,6 +111,8 @@ void PCSX::Debug::process(uint32_t oldPC, uint32_t newPC, uint32_t oldCode, uint
         const bool isSWL = basic == 0x2a;
         const bool isSW = (basic == 0x2b) || (basic == 0x3a);
         const bool isSWR = basic == 0x2e;
+        const bool isLWC2 = basic == 0x32;
+        const bool isSWC2 = basic == 0x3a;
         uint32_t offset = regs.GPR.r[(newCode >> 21) & 0x1f] + int16_t(newCode);
         if (isLWL || isLWR || isSWR || isSWL) offset &= ~3;
         if (isLB || isLBU) {
@@ -127,7 +129,7 @@ void PCSX::Debug::process(uint32_t oldPC, uint32_t newPC, uint32_t oldCode, uint
             }
             if (m_mapping_r16) markMap(offset, MAP_R16);
         }
-        if (isLW || isLWR || isLWL) {
+        if (isLW || isLWR || isLWL || isLWC2) {
             checkBP(offset, BreakpointType::Read, 4);
             if (m_breakmp_r32 && !isMapMarked(offset, MAP_R32)) {
                 triggerBP(nullptr, offset, 4, _("Read 32 map"));
@@ -148,7 +150,7 @@ void PCSX::Debug::process(uint32_t oldPC, uint32_t newPC, uint32_t oldCode, uint
             }
             if (m_mapping_w16) markMap(offset, MAP_W16);
         }
-        if (isSW || isSWR || isSWL) {
+        if (isSW || isSWR || isSWL || isSWC2) {
             checkBP(offset, BreakpointType::Write, 4);
             if (m_breakmp_w32 && !isMapMarked(offset, MAP_W32)) {
                 triggerBP(nullptr, offset, 4, _("Write 32 map"));

src/core/gte.h

@@ -51,8 +51,30 @@ class GTE {
 
     void MTC2(uint32_t code) { MTC2_internal(PCSX::g_emulator->m_cpu->m_regs.GPR.r[_Rt_], _Rd_); }
     void CTC2(uint32_t code) { CTC2_internal(PCSX::g_emulator->m_cpu->m_regs.GPR.r[_Rt_], _Rd_); }
-    void LWC2(uint32_t code) { MTC2_internal(PCSX::g_emulator->m_mem->read32(gteoB), _Rt_); }
-    void SWC2(uint32_t code) { PCSX::g_emulator->m_mem->write32(gteoB, MFC2_internal(_Rt_)); }
+    void LWC2(uint32_t code) {
+        if (gteoB & 3) {
+            PCSX::g_emulator->m_cpu->m_regs.pc -= 4;
+            PCSX::g_system->log(PCSX::LogClass::CPU, _("Unaligned address 0x%08x in LWC2 from 0x%08x\n"), gteoB,
+                                PCSX::g_emulator->m_cpu->m_regs.pc);
+            PCSX::g_emulator->m_cpu->m_regs.CP0.n.BadVAddr = gteoB;
+            PCSX::g_emulator->m_cpu->exception(PCSX::R3000Acpu::Exception::LoadAddressError,
+                                               PCSX::g_emulator->m_cpu->m_inDelaySlot);
+            return;
+        }
+        MTC2_internal(PCSX::g_emulator->m_mem->read32(gteoB), _Rt_);
+    }
+    void SWC2(uint32_t code) {
+        if (gteoB & 3) {
+            PCSX::g_emulator->m_cpu->m_regs.pc -= 4;
+            PCSX::g_system->log(PCSX::LogClass::CPU, _("Unaligned address 0x%08x in SWC2 from 0x%08x\n"), gteoB,
+                                PCSX::g_emulator->m_cpu->m_regs.pc);
+            PCSX::g_emulator->m_cpu->m_regs.CP0.n.BadVAddr = gteoB;
+            PCSX::g_emulator->m_cpu->exception(PCSX::R3000Acpu::Exception::StoreAddressError,
+                                               PCSX::g_emulator->m_cpu->m_inDelaySlot);
+            return;
+        }
+        PCSX::g_emulator->m_mem->write32(gteoB, MFC2_internal(_Rt_));
+    }
 
     void RTPS(uint32_t code);
     void NCLIP(uint32_t code);