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johnbaumannjohnbaumann
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Initial logging pass in writeRegister
1 parent 9f74534 commit 01fd6a1

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+95
-30
lines changed

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+95
-30
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‎src/spu/registers.cc

Lines changed: 95 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@
4141

4242
#include <algorithm>
4343

44+
#include "core/logger.h"
4445
#include "spu/externals.h"
4546
#include "spu/interface.h"
4647

@@ -71,21 +72,27 @@ void PCSX::SPU::impl::writeRegister(uint32_t reg, uint16_t val) {
7172

7273
regArea[(r - 0xc00) >> 1] = val;
7374

75+
// PCSX::PSXSPU_LOGGER::Log("SPU.write, writeRegister %08x: %04x\n", reg, val);
76+
7477
// Check if this is one of the voice configuration registers
7578
if (r >= 0x0c00 && r < 0x0d80) {
7679
int ch = (r >> 4) - 0xc0; // Figure out which voice it is
7780
switch (r & 0x0f) {
7881
case 0: // Left volume
7982
SetVolumeL((uint8_t)ch, val);
83+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice[%02i] Set Volume L = %04x\n", ch, val);
8084
break;
8185
case 2: // Right volume
8286
SetVolumeR((uint8_t)ch, val);
87+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice[%02i] Set Volume R = %04x\n", ch, val);
8388
break;
8489
case 4: // Pitch
8590
SetPitch(ch, val);
91+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice[%02i] ADPCM Sample Rate = %04x\n", ch, val);
8692
break;
8793
case 6: // Sample start address
8894
// Brain Dead 13 - align to 16 boundary
95+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice[%02i] ADPCM Start Address = %04x\n", ch, val);
8996
s_chan[ch].pStart = spuMemC + (uint32_t)((val << 3) & ~0xf);
9097
break;
9198
case 8: { // Attack/Decay/Sustain/Release (ADSR)
@@ -95,6 +102,7 @@ void PCSX::SPU::impl::writeRegister(uint32_t reg, uint16_t val) {
95102
(val & (ADSRFlags::AttackShiftMask | ADSRFlags::AttackStepMask)) >> 8;
96103
s_chan[ch].ADSRX.get<exDecayRate>().value = (val & ADSRFlags::DecayShiftMask) >> 4;
97104
s_chan[ch].ADSRX.get<exSustainLevel>().value = val & ADSRFlags::SustainLevelMask;
105+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice[%02i] ADSR = %04x\n", ch, val);
98106
//---------------------------------------------// stuff below is only for debug mode
99107

100108
s_chan[ch].ADSR.get<AttackModeExp>().value = (val & ADSRFlags::AttackMode) ? 1 : 0;
@@ -138,6 +146,7 @@ void PCSX::SPU::impl::writeRegister(uint32_t reg, uint16_t val) {
138146
(val & (ADSRFlags::SustainShiftMask | ADSRFlags::SustainStepMask)) >> 6;
139147
s_chan[ch].ADSRX.get<exReleaseModeExp>().value = (val & ADSRFlags::ReleaseMode) ? 1 : 0;
140148
s_chan[ch].ADSRX.get<exReleaseRate>().value = val & ADSRFlags::ReleaseShiftMask;
149+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice[%02i] ADSR2 = %04x\n", ch, val);
141150
//----------------------------------------------// stuff below is only for debug mode
142151

143152
s_chan[ch].ADSR.get<SustainModeExp>().value = (val & ADSRFlags::SustainMode) ? 1 : 0;
@@ -183,14 +192,16 @@ void PCSX::SPU::impl::writeRegister(uint32_t reg, uint16_t val) {
183192
}
184193
} break;
185194
case 12: // TODO: Emulate ADSR Volume
195+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice[%02i] ADSR Volume = %04x, unimplemented\n", ch, val);
186196
break;
187197
//------------------------------------------------//
188198
case 14: // loop?
189199
// WaitForSingleObject(s_chan[ch].hMutex,2000); // -> no multithread fuckups
190200
// align to 16-byte boundary
191201
s_chan[ch].pLoop = spuMemC + ((uint32_t)((val << 3) & ~0xf));
192-
s_chan[ch].data.get<Chan::IgnoreLoop>().value = true;
193-
// ReleaseMutex(s_chan[ch].hMutex); // -> oki, on with the thread
202+
// s_chan[ch].data.get<Chan::IgnoreLoop>().value = true;
203+
// ReleaseMutex(s_chan[ch].hMutex); // -> oki, on with the thread
204+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice[%02i] ADPCM Repeat Address = %04x\n", ch, val);
194205
break;
195206
//------------------------------------------------//
196207
}
@@ -202,6 +213,7 @@ void PCSX::SPU::impl::writeRegister(uint32_t reg, uint16_t val) {
202213
switch (r) {
203214
case H_SPUaddr:
204215
spuAddr = (uint32_t)val * 8;
216+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Data Transfer Address = %04x\n", val);
205217
break;
206218

207219
case H_SPUdata:
@@ -210,15 +222,18 @@ void PCSX::SPU::impl::writeRegister(uint32_t reg, uint16_t val) {
210222
if (spuAddr > 0x7ffff) {
211223
spuAddr = 0;
212224
}
225+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Data Transfer Fifo = %04x\n", val);
213226
break;
214227

215228
case H_SPUctrl:
216229
spuCtrl = val;
217230
m_noiseClock = (spuCtrl & (ControlFlags::NoiseShiftMask | ControlFlags::NoiseStepMask)) >> 8;
231+
PCSX::PSXSPU_LOGGER::Log("SPU.write, CTRL = %04x\n", val);
218232
break;
219233

220234
case H_SPUstat:
221235
spuStat = val & 0xf800;
236+
PCSX::PSXSPU_LOGGER::Log("SPU.write, STAT = %04x, (read-only)\n", val);
222237
break;
223238

224239
case H_SPUReverbAddr:
@@ -231,205 +246,255 @@ void PCSX::SPU::impl::writeRegister(uint32_t reg, uint16_t val) {
231246
rvb.CurrAddr = rvb.StartAddr;
232247
}
233248
}
249+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mBASE = %04x\n", val);
234250
break;
235251

236252
case H_SPUirqAddr:
237253
spuIrq = val;
238254
pSpuIrq = spuMemC + ((uint32_t)val << 3);
255+
PCSX::PSXSPU_LOGGER::Log("SPU.write, IRQ Address = %04x\n", val);
239256
break;
240257

241258
case H_SPUrvolL:
242259
rvb.VolLeft = val;
260+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vLOUT = %04x\n", val);
243261
break;
244262

245263
case H_SPUrvolR:
246264
rvb.VolRight = val;
265+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vROUT = %04x\n", val);
266+
break;
267+
//-------------------------------------------------//
268+
case H_ExtLeft:
269+
// auxprintf("EL %d\n",val);
270+
PCSX::PSXSPU_LOGGER::Log("SPU.write, External Audio Input Volume Left = %04x, unimplemented\n", val);
271+
break;
272+
//-------------------------------------------------//
273+
case H_ExtRight:
274+
// auxprintf("ER %d\n",val);
275+
PCSX::PSXSPU_LOGGER::Log("SPU.write, External Audio Input Volume Right = %04x, unimplemented\n", val);
276+
break;
277+
//-------------------------------------------------//
278+
case H_SPUmvolL:
279+
// auxprintf("ML %d\n",val);
280+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Main Volume Left = %04x, unimplemented\n", val);
281+
break;
282+
//-------------------------------------------------//
283+
case H_SPUmvolR:
284+
// auxprintf("MR %d\n",val);
285+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Main Volume Right = %04x, unimplemented\n", val);
286+
break;
287+
//-------------------------------------------------//
288+
case H_SPUMute1:
289+
// auxprintf("M0 %04x\n",val);
290+
//PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice 0..23 ON/OFF (status) (ENDX) = %04x, (read-only)\n", val);
291+
break;
292+
//-------------------------------------------------//
293+
case H_SPUMute2:
294+
// auxprintf("M1 %04x\n",val);
295+
//PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice 0..23 ON/OFF2 (status) (ENDX) = %04x, (read-only)\n", val);
247296
break;
248-
//-------------------------------------------------//
249-
250-
/*
251-
case H_ExtLeft:
252-
//auxprintf("EL %d\n",val);
253-
break;
254-
//-------------------------------------------------//
255-
case H_ExtRight:
256-
//auxprintf("ER %d\n",val);
257-
break;
258-
//-------------------------------------------------//
259-
case H_SPUmvolL:
260-
//auxprintf("ML %d\n",val);
261-
break;
262-
//-------------------------------------------------//
263-
case H_SPUmvolR:
264-
//auxprintf("MR %d\n",val);
265-
break;
266-
//-------------------------------------------------//
267-
case H_SPUMute1:
268-
//auxprintf("M0 %04x\n",val);
269-
break;
270-
//-------------------------------------------------//
271-
case H_SPUMute2:
272-
//auxprintf("M1 %04x\n",val);
273-
break;
274-
*/
275297

276298
case H_SPUon1:
277299
SoundOn(0, 16, val);
300+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice 0..23 Key ON = %04x\n", val);
278301
break;
279302

280303
case H_SPUon2:
281304
SoundOn(16, 24, val);
305+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice 0..23 Key ON2 = %04x\n", val);
282306
break;
283307

284308
case H_SPUoff1:
285309
SoundOff(0, 16, val);
310+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice 0..23 Key OFF = %04x\n", val);
286311
break;
287312

288313
case H_SPUoff2:
289314
SoundOff(16, 24, val);
315+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice 0..23 Key OFF2 = %04x\n", val);
290316
break;
291317

292318
case H_CDLeft:
293319
iLeftXAVol = val & 0x7fff;
294320
if (cddavCallback) {
295321
cddavCallback(0, val);
296322
}
323+
PCSX::PSXSPU_LOGGER::Log("SPU.write, CD Audio Input Volume Left = %04x, unimplemented\n", val);
297324
break;
298325

299326
case H_CDRight:
300327
iRightXAVol = val & 0x7fff;
301328
if (cddavCallback) {
302329
cddavCallback(1, val);
303330
}
331+
PCSX::PSXSPU_LOGGER::Log("SPU.write, CD Audio Input Volume Right = %04x, unimplemented\n", val);
304332
break;
305333

306334
case H_FMod1:
307335
FModOn(0, 16, val);
336+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice 0..23 Pitch Modulation Enable Flags = %04x\n", val);
308337
break;
309338

310339
case H_FMod2:
311340
FModOn(16, 24, val);
341+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Voice 0..23 Pitch Modulation Enable Flags2 = %04x\n", val);
312342
break;
313343

314344
case H_Noise1:
315345
NoiseOn(0, 16, val);
346+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Noise mode enable 0..23 = %04x\n", val);
316347
break;
317348

318349
case H_Noise2:
319350
NoiseOn(16, 24, val);
351+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Noise mode enable2 0..23 = %04x\n", val);
320352
break;
321353

322354
case H_RVBon1:
323355
ReverbOn(0, 16, val);
356+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Reverb enable 0..23 = %04x\n", val);
324357
break;
325358

326359
case H_RVBon2:
327360
ReverbOn(16, 24, val);
361+
PCSX::PSXSPU_LOGGER::Log("SPU.write, Reverb enable2 0..23 = %04x\n", val);
328362
break;
329363

330364
case H_Reverb + 0:
331-
332365
rvb.FB_SRC_A = val;
333366

334367
// OK, here's the fake REVERB stuff...
335368
// depending on effect we do more or less delay and repeats... bah
336369
// still... better than nothing :)
337370

338371
SetREVERB(val);
372+
PCSX::PSXSPU_LOGGER::Log("SPU.write, dAPF1 = %04x\n", val);
339373
break;
340374

341375
case H_Reverb + 2:
342376
rvb.FB_SRC_B = (int16_t)val;
377+
PCSX::PSXSPU_LOGGER::Log("SPU.write, dAPF2 = %04x\n", val);
343378
break;
344379
case H_Reverb + 4:
345380
rvb.IIR_ALPHA = (int16_t)val;
381+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vIIR = %04x\n", val);
346382
break;
347383
case H_Reverb + 6:
348384
rvb.ACC_COEF_A = (int16_t)val;
385+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vCOMB1 = %04x\n", val);
349386
break;
350387
case H_Reverb + 8:
351388
rvb.ACC_COEF_B = (int16_t)val;
389+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vCOMB2 = %04x\n", val);
352390
break;
353391
case H_Reverb + 10:
354392
rvb.ACC_COEF_C = (int16_t)val;
393+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vCOMB3 = %04x\n", val);
355394
break;
356395
case H_Reverb + 12:
357396
rvb.ACC_COEF_D = (int16_t)val;
397+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vCOMB4 = %04x\n", val);
358398
break;
359399
case H_Reverb + 14:
360400
rvb.IIR_COEF = (int16_t)val;
401+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vWALL = %04x\n", val);
361402
break;
362403
case H_Reverb + 16:
363404
rvb.FB_ALPHA = (int16_t)val;
405+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vAPF1 = %04x\n", val);
364406
break;
365407
case H_Reverb + 18:
366408
rvb.FB_X = (int16_t)val;
409+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vAPF2 = %04x\n", val);
367410
break;
368411
case H_Reverb + 20:
369412
rvb.IIR_DEST_A0 = (int16_t)val;
413+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mLSAME = %04x\n", val);
370414
break;
371415
case H_Reverb + 22:
372416
rvb.IIR_DEST_A1 = (int16_t)val;
417+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mRSAME = %04x\n", val);
373418
break;
374419
case H_Reverb + 24:
375420
rvb.ACC_SRC_A0 = (int16_t)val;
421+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mLCOMB1 = %04x\n", val);
376422
break;
377423
case H_Reverb + 26:
378424
rvb.ACC_SRC_A1 = (int16_t)val;
425+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mRCOMB1 = %04x\n", val);
379426
break;
380427
case H_Reverb + 28:
381428
rvb.ACC_SRC_B0 = (int16_t)val;
429+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mLCOMB2 = %04x\n", val);
382430
break;
383431
case H_Reverb + 30:
384432
rvb.ACC_SRC_B1 = (int16_t)val;
433+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mRCOMB2 = %04x\n", val);
385434
break;
386435
case H_Reverb + 32:
387436
rvb.IIR_SRC_A0 = (int16_t)val;
437+
PCSX::PSXSPU_LOGGER::Log("SPU.write, dLSAME = %04x\n", val);
388438
break;
389439
case H_Reverb + 34:
390440
rvb.IIR_SRC_A1 = (int16_t)val;
441+
PCSX::PSXSPU_LOGGER::Log("SPU.write, dRSAME = %04x\n", val);
391442
break;
392443
case H_Reverb + 36:
393444
rvb.IIR_DEST_B0 = (int16_t)val;
445+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mLDIFF = %04x\n", val);
394446
break;
395447
case H_Reverb + 38:
396448
rvb.IIR_DEST_B1 = (int16_t)val;
449+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mRDIFF = %04x\n", val);
397450
break;
398451
case H_Reverb + 40:
399452
rvb.ACC_SRC_C0 = (int16_t)val;
453+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mLCOMB3 = %04x\n", val);
400454
break;
401455
case H_Reverb + 42:
402456
rvb.ACC_SRC_C1 = (int16_t)val;
457+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mRCOMB3 = %04x\n", val);
403458
break;
404459
case H_Reverb + 44:
405460
rvb.ACC_SRC_D0 = (int16_t)val;
461+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mLCOMB4 = %04x\n", val);
406462
break;
407463
case H_Reverb + 46:
408464
rvb.ACC_SRC_D1 = (int16_t)val;
465+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mRCOMB4 = %04x\n", val);
409466
break;
410467
case H_Reverb + 48:
411468
rvb.IIR_SRC_B1 = (int16_t)val;
469+
PCSX::PSXSPU_LOGGER::Log("SPU.write, dLDIFF = %04x\n", val);
412470
break;
413471
case H_Reverb + 50:
414472
rvb.IIR_SRC_B0 = (int16_t)val;
473+
PCSX::PSXSPU_LOGGER::Log("SPU.write, dRDIFF = %04x\n", val);
415474
break;
416475
case H_Reverb + 52:
417476
rvb.MIX_DEST_A0 = (int16_t)val;
477+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mLAPF1 = %04x\n", val);
418478
break;
419479
case H_Reverb + 54:
420480
rvb.MIX_DEST_A1 = (int16_t)val;
481+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mRAPF1 = %04x\n", val);
421482
break;
422483
case H_Reverb + 56:
423484
rvb.MIX_DEST_B0 = (int16_t)val;
485+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mLAPF2 = %04x\n", val);
424486
break;
425487
case H_Reverb + 58:
426488
rvb.MIX_DEST_B1 = (int16_t)val;
489+
PCSX::PSXSPU_LOGGER::Log("SPU.write, mRAPF2 = %04x\n", val);
427490
break;
428491
case H_Reverb + 60:
429492
rvb.IN_COEF_L = (int16_t)val;
493+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vLIN = %04x\n", val);
430494
break;
431495
case H_Reverb + 62:
432496
rvb.IN_COEF_R = (int16_t)val;
497+
PCSX::PSXSPU_LOGGER::Log("SPU.write, vRIN = %04x\n", val);
433498
break;
434499
}
435500

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