Porting VESC to Teensy 4

[Juanduino]

Hey Greiman

Im working on a BLDC controller hardware project and would like to utilize the eminence power of the T4 for that purpose.

The overall purpose is naturally to empower the emerging EV community with a open EV framework for 12-72v systems on a standard CAN BUS. The BLDC controller will just be the muscle in this regard. Another node will take care of blinkers, horn, low beam, high beam, beam me up Scotty.

The question goes something like this:

Will you make a VESC port for the T4, and could you clean the windshield while your at it?

With your insights into ChRt you are the one to evaluate if it can be done and how much work vs the benefits involved.

//Morphius

[greiman]

ChRt runs on Teensy 4.x. I ported ChibiOS as ChRt a library so people could use Arduino libraries. Arduino libraries are not designed to for a multi-threaded environment.

I have no interest in a VESC port for Teensy.

For serious projects I use ChibiOS in native mode on STM32 Cortex-M7, It has a great HAL with many drivers.

[Juanduino]

Point taken...

There are some benefits to using standalone MCU, that´s for sure. Thanks for the reply, It did clarify.

[Juanduino]

Compatibility

Cortex-M7 is backwards compatible with the Cortex-M4 instruction set
STM32F7 series is pin-to-pin compatible with the STM32F4 series*

• Note: see datasheet for the specific case of 64- and 100-pin packages

https://www.st.com/en/microcontrollers-microprocessors/stm32f7-series.html

*I see the STM32 M7 family is hot swab-able with cortex M4´s.

[greiman]

If you want options, Mbed is a choice, it supports over 150 MCU development boards.

I like ChibiOS but it is really best for STM32. I like STM32 peripherals for example the ADCs can be programmed to scan a series of up to 19 channels under DMA control.

FreeRTOS is popular but I don't like it as much. Amazon now owns FreeRTOS and is doing lots of development so it may be improved.

[Juanduino]

I like the STM32´s supported in the VESC firmware. No issues there. I see there is also some sort of STM SENT protocol lib.

Im working on a project where i need to reed some hall sensors. The SENT protocol lookes really interesting in that regard, since the application is close to a stepper motor, where there could be high EMI.

Here is a good reed on the subject. (source: http://www.diva-portal.org/smash/get/diva2:1162587/FULLTEXT02).

If you find the time. A arduino SENT lib would be very awesome.

Timer: Timer-IP is included in the design from the SOPC builder for measuring
time. The timer-IP is import in the Nios IDE through the system header file
so it communicate through the system file that is generated automatically after
generation and compilation of the quartus design. The timer configuration is
shown in the listing.
#d e f i n e TIMER_START IOWR_32DIRECT(TIMER_0_BASE, 4 , 0 X80000000 )
#d e f i n e TIMER_STOP IOWR_32DIRECT(TIMER_0_BASE, 4 , 0 X00000000 )
#d e f i n e TIMER_RESET IOWR_32DIRECT(TIMER_0_BASE, 4 , 0 X40000000 )
#d e f i n e TIMER_READ IORD_32DIRECT(TIMER_0_BASE, 0 )
Timer 1 f o r time c a l c u l a t i o n
#d e f i n e TIMER1_START IOWR_32DIRECT(TIMER_1_BASE, 4 , 0 X80000000 )
#d e f i n e TIMER1_STOP IOWR_32DIRECT(TIMER_1_BASE, 4 , 0 X00000000 )
#d e f i n e TIMER1_RESET IOWR_32DIRECT(TIMER_1_BASE, 4 , 0 X40000000 )
#d e f i n e TIMER1_READ IORD_32DIRECT(TIMER_1_BASE, 0 )
Interrupt: To capture the falling edge the interrupt is set in the PIO configuration in the SOPC builder design. Whenever a falling edge occur at the PIO an
IRQ is generated. The NIOS II architecture provides 32 non-vectored hardware
interrupts. The processor will jump to a single exception addr