RP2350 board design

[phil-barrett]

While the RP2350 design has been discussed in the Core/Discussions, it really belongs in this group.

Current status.

Completed the design of an RP2350B (48 GPIO) based 5 Axis board. I had 5 units built and they seem to work. Sent a couple out for beta testing.

Made some changes and have a second set of 5 being built. Biggest issue was the 5V regulator (got too hot with Ethernet adaptor installed) so switched that to a buck regulator. Also, added a 4th digital input, a number of manufacturability improvements and switched to an LDO 1.1V regulator for the RP2350 digital section. This should help reduce the cost and keep the board more affordable. I expect to get them next week and if they work, will have a few more beta level boards if anyone is interested in testing it.

I've already started looking at the next turn of the board. The biggest question is about Flash memory space. The largest firmware I have generated is only about 330 kB in size. The flash memory chip I used is 16 MB. I could move to a 2 MB flash chip and save a bit of cost (and make for a less expensive end product). My thinking is that 2 MB is a reasonable size. Also, the RP2354 will have 2 MB of embedded flash and I am looking at that for a follow on board - hopefully with a further cost reduction. I am interested in people's opinions.

For more information, see my github repo for the RP23U5XBB.