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eric fang
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cmd/internal/obj/arm64: fix an encoding error of CMPW instruction
For arm64 CMP, ADD and other similar extended register instructions, if there is no extension, the default extion is LSL<<0, but the default encoding value (the value of 'option' field) of 32-bit instruction and 64-bit instruction is different, 32-bit is 2 and 64-bit is 3. But the current assembler incorrectly encodes the value of 32-bit instruction to 3. This CL fixes this error. Change-Id: I0e09af2c9c5047a4ed2db7d1183290283db9c31c Reviewed-on: https://go-review.googlesource.com/c/go/+/329749 Reviewed-by: eric fang <eric.fang@arm.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Run-TryBot: eric fang <eric.fang@arm.com> Run-TryBot: Cherry Mui <cherryyz@google.com> Trust: Dmitri Shuralyov <dmitshur@golang.org>
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src/cmd/asm/internal/asm/testdata/arm64.s

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
8989
CMP R1<<33, R2
9090
CMP R22.SXTX, RSP // ffe336eb
9191
CMP $0x22220000, RSP // CMP $572653568, RSP // 5b44a4d2ff633beb
92-
CMPW $0x22220000, RSP // CMPW $572653568, RSP // 5b44a452ff633b6b
92+
CMPW $0x22220000, RSP // CMPW $572653568, RSP // 5b44a452ff433b6b
9393
CCMN MI, ZR, R1, $4 // e44341ba
9494
// MADD Rn,Rm,Ra,Rd
9595
MADD R1, R2, R3, R4 // 6408019b
@@ -377,6 +377,7 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
377377
MOVD $0x1000100010001000, RSP // MOVD $1152939097061330944, RSP // ff8304b2
378378
MOVW $0x10001000, RSP // MOVW $268439552, RSP // ff830432
379379
ADDW $0x10001000, R1 // ADDW $268439552, R1 // fb83043221001b0b
380+
ADDW $0x22220000, RSP, R3 // ADDW $572653568, RSP, R3 // 5b44a452e3433b0b
380381

381382
// move a large constant to a Vd.
382383
VMOVS $0x80402010, V11 // VMOVS $2151686160, V11

src/cmd/internal/obj/arm64/asm7.go

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4333,8 +4333,10 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
43334333
if p.To.Reg == REG_RSP && isADDSop(p.As) {
43344334
c.ctxt.Diag("illegal destination register: %v\n", p)
43354335
}
4336+
lsl0 := LSL0_64
43364337
if isADDWop(p.As) || isANDWop(p.As) {
43374338
o1 = c.omovconst(AMOVW, p, &p.From, REGTMP)
4339+
lsl0 = LSL0_32
43384340
} else {
43394341
o1 = c.omovconst(AMOVD, p, &p.From, REGTMP)
43404342
}
@@ -4350,7 +4352,7 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
43504352
if p.To.Reg == REGSP || r == REGSP {
43514353
o2 = c.opxrrr(p, p.As, false)
43524354
o2 |= REGTMP & 31 << 16
4353-
o2 |= LSL0_64
4355+
o2 |= uint32(lsl0)
43544356
} else {
43554357
o2 = c.oprrr(p, p.As)
43564358
o2 |= REGTMP & 31 << 16 /* shift is 0 */

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