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C++: Add more lambda capture IR tests
1 parent 3119885 commit 3fed59f

9 files changed

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-0
lines changed

‎cpp/ql/test/library-tests/ir/ir/PrintAST.expected

Lines changed: 208 additions & 0 deletions
Large diffs are not rendered by default.

‎cpp/ql/test/library-tests/ir/ir/aliased_ssa_consistency.expected

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,10 @@ sideEffectWithoutPrimary
88
instructionWithoutSuccessor
99
| ir.cpp:1688:24:1690:5 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1683:6:1683:20 | void captured_lambda(int, int&, int&&) | void captured_lambda(int, int&, int&&) |
1010
| ir.cpp:1689:28:1689:54 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1688:46:1688:46 | void (void captured_lambda(int, int&, int&&))::(lambda [] type at line 1688, col. 25)::operator()() const | void (void captured_lambda(int, int&, int&&))::(lambda [] type at line 1688, col. 25)::operator()() const |
11+
| ir.cpp:1702:25:1708:9 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1701:10:1701:10 | void TrivialLambdaClass::m() const | void TrivialLambdaClass::m() const |
12+
| ir.cpp:1705:29:1707:13 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1702:34:1702:34 | void (void TrivialLambdaClass::m() const)::(lambda [] type at line 1702, col. 26)::operator()() const | void (void TrivialLambdaClass::m() const)::(lambda [] type at line 1702, col. 26)::operator()() const |
13+
| ir.cpp:1716:20:1718:5 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1712:6:1712:21 | void captured_lambda2(TrivialLambdaClass, TrivialLambdaClass&, TrivialLambdaClass&&) | void captured_lambda2(TrivialLambdaClass, TrivialLambdaClass&, TrivialLambdaClass&&) |
14+
| ir.cpp:1717:24:1717:31 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1716:42:1716:42 | void (void captured_lambda2(TrivialLambdaClass, TrivialLambdaClass&, TrivialLambdaClass&&))::(lambda [] type at line 1716, col. 21)::operator()() const | void (void captured_lambda2(TrivialLambdaClass, TrivialLambdaClass&, TrivialLambdaClass&&))::(lambda [] type at line 1716, col. 21)::operator()() const |
1115
ambiguousSuccessors
1216
unexplainedLoop
1317
unnecessaryPhiInstruction

‎cpp/ql/test/library-tests/ir/ir/aliased_ssa_consistency_unsound.expected

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,10 @@ sideEffectWithoutPrimary
88
instructionWithoutSuccessor
99
| ir.cpp:1688:24:1690:5 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1683:6:1683:20 | void captured_lambda(int, int&, int&&) | void captured_lambda(int, int&, int&&) |
1010
| ir.cpp:1689:28:1689:54 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1688:46:1688:46 | void (void captured_lambda(int, int&, int&&))::(lambda [] type at line 1688, col. 25)::operator()() const | void (void captured_lambda(int, int&, int&&))::(lambda [] type at line 1688, col. 25)::operator()() const |
11+
| ir.cpp:1702:25:1708:9 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1701:10:1701:10 | void TrivialLambdaClass::m() const | void TrivialLambdaClass::m() const |
12+
| ir.cpp:1705:29:1707:13 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1702:34:1702:34 | void (void TrivialLambdaClass::m() const)::(lambda [] type at line 1702, col. 26)::operator()() const | void (void TrivialLambdaClass::m() const)::(lambda [] type at line 1702, col. 26)::operator()() const |
13+
| ir.cpp:1716:20:1718:5 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1712:6:1712:21 | void captured_lambda2(TrivialLambdaClass, TrivialLambdaClass&, TrivialLambdaClass&&) | void captured_lambda2(TrivialLambdaClass, TrivialLambdaClass&, TrivialLambdaClass&&) |
14+
| ir.cpp:1717:24:1717:31 | FieldAddress: {...} | Instruction 'FieldAddress: {...}' has no successors in function '$@'. | ir.cpp:1716:42:1716:42 | void (void captured_lambda2(TrivialLambdaClass, TrivialLambdaClass&, TrivialLambdaClass&&))::(lambda [] type at line 1716, col. 21)::operator()() const | void (void captured_lambda2(TrivialLambdaClass, TrivialLambdaClass&, TrivialLambdaClass&&))::(lambda [] type at line 1716, col. 21)::operator()() const |
1115
ambiguousSuccessors
1216
unexplainedLoop
1317
unnecessaryPhiInstruction

‎cpp/ql/test/library-tests/ir/ir/ir.cpp

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1696,4 +1696,26 @@ int goto_on_same_line() {
16961696
return x;
16971697
}
16981698

1699+
class TrivialLambdaClass {
1700+
public:
1701+
void m() const {
1702+
auto l_m_outer = [*this] {
1703+
m();
1704+
1705+
auto l_m_inner = [*this] {
1706+
m();
1707+
};
1708+
};
1709+
};
1710+
};
1711+
1712+
void captured_lambda2(TrivialLambdaClass p1, TrivialLambdaClass &p2, TrivialLambdaClass &&p3) {
1713+
const TrivialLambdaClass l1;
1714+
const TrivialLambdaClass &l2 = TrivialLambdaClass();
1715+
1716+
auto l_outer1 = [p1, p2, p3, l1, l2] {
1717+
auto l_inner1 = [p1] {};
1718+
};
1719+
}
1720+
16991721
// semmle-extractor-options: -std=c++17 --clang

‎cpp/ql/test/library-tests/ir/ir/operand_locations.expected

Lines changed: 88 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7713,6 +7713,94 @@
77137713
| ir.cpp:1696:10:1696:10 | Address | &:r1696_2 |
77147714
| ir.cpp:1696:10:1696:10 | Load | m1694_3 |
77157715
| ir.cpp:1696:10:1696:10 | StoreValue | r1696_3 |
7716+
| ir.cpp:1701:10:1701:10 | Address | &:r1701_5 |
7717+
| ir.cpp:1701:10:1701:10 | Address | &:r1701_5 |
7718+
| ir.cpp:1701:10:1701:10 | Address | &:r1701_7 |
7719+
| ir.cpp:1701:10:1701:10 | ChiPartial | partial:m1701_3 |
7720+
| ir.cpp:1701:10:1701:10 | ChiTotal | total:m1701_2 |
7721+
| ir.cpp:1701:10:1701:10 | Load | m1701_6 |
7722+
| ir.cpp:1702:25:1708:9 | Address | &:r1702_2 |
7723+
| ir.cpp:1702:25:1708:9 | Unary | r1702_2 |
7724+
| ir.cpp:1702:34:1702:34 | Address | &:r1702_5 |
7725+
| ir.cpp:1702:34:1702:34 | Address | &:r1702_5 |
7726+
| ir.cpp:1702:34:1702:34 | Address | &:r1702_7 |
7727+
| ir.cpp:1702:34:1702:34 | ChiPartial | partial:m1702_3 |
7728+
| ir.cpp:1702:34:1702:34 | ChiTotal | total:m1702_2 |
7729+
| ir.cpp:1702:34:1702:34 | Load | m1702_6 |
7730+
| ir.cpp:1703:13:1703:13 | Address | &:r1703_1 |
7731+
| ir.cpp:1703:13:1703:13 | Address | &:r1703_4 |
7732+
| ir.cpp:1703:13:1703:13 | Arg(this) | this:r1703_4 |
7733+
| ir.cpp:1703:13:1703:13 | CallTarget | func:r1703_5 |
7734+
| ir.cpp:1703:13:1703:13 | ChiPartial | partial:m1703_7 |
7735+
| ir.cpp:1703:13:1703:13 | ChiTotal | total:m1702_4 |
7736+
| ir.cpp:1703:13:1703:13 | Load | m1702_6 |
7737+
| ir.cpp:1703:13:1703:13 | SideEffect | ~m1702_4 |
7738+
| ir.cpp:1703:13:1703:13 | SideEffect | ~m1702_8 |
7739+
| ir.cpp:1703:13:1703:13 | Unary | r1703_2 |
7740+
| ir.cpp:1703:13:1703:13 | Unary | r1703_3 |
7741+
| ir.cpp:1705:29:1707:13 | Address | &:r1705_2 |
7742+
| ir.cpp:1705:29:1707:13 | Unary | r1705_2 |
7743+
| ir.cpp:1705:38:1705:38 | Address | &:r1705_5 |
7744+
| ir.cpp:1705:38:1705:38 | Address | &:r1705_5 |
7745+
| ir.cpp:1705:38:1705:38 | Address | &:r1705_7 |
7746+
| ir.cpp:1705:38:1705:38 | Address | &:r1705_7 |
7747+
| ir.cpp:1705:38:1705:38 | ChiPartial | partial:m1705_3 |
7748+
| ir.cpp:1705:38:1705:38 | ChiTotal | total:m1705_2 |
7749+
| ir.cpp:1705:38:1705:38 | Load | m1705_6 |
7750+
| ir.cpp:1705:38:1705:38 | SideEffect | m1705_8 |
7751+
| ir.cpp:1705:38:1705:38 | SideEffect | ~m1706_8 |
7752+
| ir.cpp:1706:17:1706:17 | Address | &:r1706_1 |
7753+
| ir.cpp:1706:17:1706:17 | Address | &:r1706_4 |
7754+
| ir.cpp:1706:17:1706:17 | Arg(this) | this:r1706_4 |
7755+
| ir.cpp:1706:17:1706:17 | CallTarget | func:r1706_5 |
7756+
| ir.cpp:1706:17:1706:17 | ChiPartial | partial:m1706_7 |
7757+
| ir.cpp:1706:17:1706:17 | ChiTotal | total:m1705_4 |
7758+
| ir.cpp:1706:17:1706:17 | Load | m1705_6 |
7759+
| ir.cpp:1706:17:1706:17 | SideEffect | ~m1705_4 |
7760+
| ir.cpp:1706:17:1706:17 | SideEffect | ~m1705_8 |
7761+
| ir.cpp:1706:17:1706:17 | Unary | r1706_2 |
7762+
| ir.cpp:1706:17:1706:17 | Unary | r1706_3 |
7763+
| ir.cpp:1712:6:1712:21 | ChiPartial | partial:m1712_3 |
7764+
| ir.cpp:1712:6:1712:21 | ChiTotal | total:m1712_2 |
7765+
| ir.cpp:1712:42:1712:43 | Address | &:r1712_5 |
7766+
| ir.cpp:1712:66:1712:67 | Address | &:r1712_7 |
7767+
| ir.cpp:1712:66:1712:67 | Address | &:r1712_7 |
7768+
| ir.cpp:1712:66:1712:67 | Address | &:r1712_9 |
7769+
| ir.cpp:1712:66:1712:67 | Load | m1712_8 |
7770+
| ir.cpp:1712:91:1712:92 | Address | &:r1712_11 |
7771+
| ir.cpp:1712:91:1712:92 | Address | &:r1712_11 |
7772+
| ir.cpp:1712:91:1712:92 | Address | &:r1712_13 |
7773+
| ir.cpp:1712:91:1712:92 | Load | m1712_12 |
7774+
| ir.cpp:1713:30:1713:31 | Address | &:r1713_1 |
7775+
| ir.cpp:1714:31:1714:32 | Address | &:r1714_1 |
7776+
| ir.cpp:1714:36:1714:55 | Address | &:r1714_2 |
7777+
| ir.cpp:1714:36:1714:55 | Address | &:r1714_3 |
7778+
| ir.cpp:1714:36:1714:55 | Address | &:r1714_3 |
7779+
| ir.cpp:1714:36:1714:55 | Load | m1714_5 |
7780+
| ir.cpp:1714:36:1714:55 | StoreValue | r1714_4 |
7781+
| ir.cpp:1714:36:1714:55 | StoreValue | r1714_6 |
7782+
| ir.cpp:1714:36:1714:55 | StoreValue | r1714_9 |
7783+
| ir.cpp:1714:36:1714:55 | Unary | r1714_2 |
7784+
| ir.cpp:1714:36:1714:55 | Unary | r1714_8 |
7785+
| ir.cpp:1716:20:1718:5 | Address | &:r1716_2 |
7786+
| ir.cpp:1716:20:1718:5 | Unary | r1716_2 |
7787+
| ir.cpp:1716:42:1716:42 | Address | &:r1716_5 |
7788+
| ir.cpp:1716:42:1716:42 | Address | &:r1716_5 |
7789+
| ir.cpp:1716:42:1716:42 | Address | &:r1716_7 |
7790+
| ir.cpp:1716:42:1716:42 | ChiPartial | partial:m1716_3 |
7791+
| ir.cpp:1716:42:1716:42 | ChiTotal | total:m1716_2 |
7792+
| ir.cpp:1716:42:1716:42 | Load | m1716_6 |
7793+
| ir.cpp:1717:24:1717:31 | Address | &:r1717_2 |
7794+
| ir.cpp:1717:24:1717:31 | Unary | r1717_2 |
7795+
| ir.cpp:1717:30:1717:30 | Address | &:r1717_5 |
7796+
| ir.cpp:1717:30:1717:30 | Address | &:r1717_5 |
7797+
| ir.cpp:1717:30:1717:30 | Address | &:r1717_7 |
7798+
| ir.cpp:1717:30:1717:30 | Address | &:r1717_7 |
7799+
| ir.cpp:1717:30:1717:30 | ChiPartial | partial:m1717_3 |
7800+
| ir.cpp:1717:30:1717:30 | ChiTotal | total:m1717_2 |
7801+
| ir.cpp:1717:30:1717:30 | Load | m1717_6 |
7802+
| ir.cpp:1717:30:1717:30 | SideEffect | m1717_3 |
7803+
| ir.cpp:1717:30:1717:30 | SideEffect | m1717_8 |
77167804
| perf-regression.cpp:6:3:6:5 | Address | &:r6_5 |
77177805
| perf-regression.cpp:6:3:6:5 | Address | &:r6_5 |
77187806
| perf-regression.cpp:6:3:6:5 | Address | &:r6_7 |

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