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spi: add handling for ClockData::Lsb* modes
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-12
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2 files changed

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CHANGELOG.md

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@@ -4,6 +4,10 @@ All notable changes to this project will be documented in this file.
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The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
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and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
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## [Unreleased]
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### Fixed
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- Fixed SPI SCLK pin states for the `ClockData::MsbPosIn` and `ClockData::LsbPosIn` SPI modes.
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## [0.23.1] - 2025-03-29
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### Added
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- Added a `with_device` method to access device-specific features, such as the EEPROM.

src/spi.rs

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@@ -501,15 +501,14 @@ where
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// assert the chip select pin
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let mut value_cs_asserted: u8 = lock.value & !self.cs_mask();
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// drive pin 0, the clock pin according to the CPOL setting
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// Reference: https://github.com/ftdi-rs/ftdi-embedded-hal/pull/69
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match self.pol.clk {
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ClockData::MsbNegIn => {
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ClockData::MsbNegIn | ClockData::LsbNegIn => {
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value_cs_asserted |= 1;
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}
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ClockData::MsbPosIn => {
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value_cs_asserted &= !(1);
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}
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_ => {
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unimplemented!()
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ClockData::MsbPosIn | ClockData::LsbPosIn => {
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value_cs_asserted &= !1;
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}
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}
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@@ -555,17 +554,18 @@ where
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// deassert the chip select pin
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let mut value_cs_deasserted: u8 = lock.value | self.cs_mask();
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// drive pin 0, the clock pin according to the CPOL setting
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// Reference: https://github.com/ftdi-rs/ftdi-embedded-hal/pull/69
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match self.pol.clk {
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ClockData::MsbNegIn => {
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ClockData::MsbNegIn | ClockData::LsbNegIn => {
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value_cs_deasserted |= 1;
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}
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ClockData::MsbPosIn => {
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value_cs_deasserted &= !(1);
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}
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_ => {
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unimplemented!()
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ClockData::MsbPosIn | ClockData::LsbPosIn => {
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value_cs_deasserted &= !1;
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}
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}
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lock.ft.send(
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MpsseCmdBuilder::new()
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.set_gpio_lower(value_cs_deasserted, direction)

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