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Merge pull request #32 from firesim/dev
FireSim 1.12 Release (Dev -> Master) Tracking PR
2 parents b4544da + 6cd1a8c commit e2a9752

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‎hdk/cl/developer_designs/cl_firesim/build/scripts/create_dcp_from_cl.tcl

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -147,6 +147,8 @@ set_msg_config -id {Timing 38-436} -suppress
147147
# Promote the following critical warnings to errors to prevent AGFI generation
148148
# Design not completely routed
149149
set_msg_config -id {Route 35-1} -new_severity "ERROR"
150+
# Route 35-535] Clock Net: <net> is not completely routed.
151+
set_msg_config -id {Route 35-535} -new_severity "ERROR"
150152

151153
# Check that an email address has been set, else unset notify_via_sns
152154

@@ -175,6 +177,10 @@ switch $strategy {
175177
puts "EXPLORE strategy."
176178
source $HDK_SHELL_DIR/build/scripts/strategy_EXPLORE.tcl
177179
}
180+
"NORETIMING" {
181+
puts "NORETIMING strategy."
182+
source $HDK_SHELL_DIR/build/scripts/strategy_NORETIMING.tcl
183+
}
178184
"TIMING" {
179185
puts "TIMING strategy."
180186
source $HDK_SHELL_DIR/build/scripts/strategy_TIMING.tcl
@@ -279,7 +285,7 @@ if {$implement} {
279285
impl_step opt_design $TOP "-merge_equivalent_drivers -sweep"
280286
}
281287
}
282-
report_utilization -hierarchical -file $CL_DIR/build/reports/${timestamp}.post_opt_utilization.rpt
288+
report_utilization -hierarchical -hierarchical_percentages -file $CL_DIR/build/reports/${timestamp}.post_opt_utilization.rpt
283289

284290
########################
285291
# CL Place
@@ -325,7 +331,7 @@ if {$implement} {
325331
report_timing_summary -file $CL_DIR/build/reports/${timestamp}.SH_CL_final_timing_summary.rpt
326332

327333
# Report utilization
328-
report_utilization -hierarchical -file $CL_DIR/build/reports/${timestamp}.SH_CL_utilization.rpt
334+
report_utilization -hierarchical -hierarchical_percentages -file $CL_DIR/build/reports/${timestamp}.SH_CL_utilization.rpt
329335

330336
# This is what will deliver to AWS
331337
puts "AWS FPGA: ([clock format [clock seconds] -format %T]) - Writing final DCP to to_aws directory.";

‎hdk/cl/developer_designs/cl_firesim/build/scripts/synth_cl_firesim.tcl

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,7 @@ puts "AWS FPGA: ([clock format [clock seconds] -format %T]) Start design synthes
117117

118118
update_compile_order -fileset sources_1
119119
puts "\nRunning synth_design for $CL_MODULE $CL_DIR/build/scripts \[[clock format [clock seconds] -format {%a %b %d %H:%M:%S %Y}]\]"
120-
eval [concat synth_design -top $CL_MODULE -verilog_define XSDB_SLV_DIS $VDEFINES -part [DEVICE_TYPE] -mode out_of_context $synth_options -directive $synth_directive -retiming]
120+
eval [concat synth_design -top $CL_MODULE -verilog_define XSDB_SLV_DIS $VDEFINES -part [DEVICE_TYPE] -mode out_of_context $synth_options -directive $synth_directive]
121121

122122
set failval [catch {exec grep "FAIL" failfast.csv}]
123123
if { $failval==0 } {
@@ -128,6 +128,9 @@ if { $failval==0 } {
128128
puts "AWS FPGA: ([clock format [clock seconds] -format %T]) writing post synth checkpoint.";
129129
write_checkpoint -force $CL_DIR/build/checkpoints/${timestamp}.CL.post_synth.dcp
130130

131+
report_utilization -hierarchical -hierarchical_percentages -file $CL_DIR/build/reports/${timestamp}.post_synth_utilization.rpt
132+
report_control_sets -verbose -file $CL_DIR/build/reports/${timestamp}.post_synth_control_sets.rpt
133+
131134
close_project
132135
#Set param back to default value
133136
set_param sta.enableAutoGenClkNamePersistence 1

‎hdk/common/shell_v04261818/build/scripts/aws_build_dcp_from_cl.sh

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@
1818
# Usage help
1919
function usage
2020
{
21-
echo "usage: aws_build_dcp_from_cl.sh [ [-script <vivado_script>] | [-strategy BASIC | DEFAULT | EXPLORE | TIMING | CONGESTION] [-clock_recipe_a A0 | A1 | A2] [-clock_recipe_b B0 | B1 | B2 | B3 | B4 | B5] [-clock_recipe_c C0 | C1 | C2 | C3] [-uram_option 2 | 3 | 4] [-vdefine macro1,macro2,macro3,.....,macrox] -foreground] [-notify] | [-h] | [-H] | [-help] ]"
21+
echo "usage: aws_build_dcp_from_cl.sh [ [-script <vivado_script>] | [-strategy BASIC | DEFAULT | EXPLORE | TIMING | NORETIMING | CONGESTION] [-clock_recipe_a A0 | A1 | A2] [-clock_recipe_b B0 | B1 | B2 | B3 | B4 | B5] [-clock_recipe_c C0 | C1 | C2 | C3] [-uram_option 2 | 3 | 4] [-vdefine macro1,macro2,macro3,.....,macrox] -foreground] [-notify] | [-h] | [-H] | [-help] ]"
2222
echo " "
2323
echo "By default the build is run in the background using nohup so that the"
2424
echo "process will not be terminated if the terminal window is closed."
@@ -117,7 +117,7 @@ fi
117117

118118
# Check that strategy is valid
119119
shopt -s extglob
120-
if [[ $strategy != @(BASIC|DEFAULT|EXPLORE|TIMING|CONGESTION) ]]; then
120+
if [[ $strategy != @(BASIC|DEFAULT|EXPLORE|TIMING|CONGESTION|NORETIMING) ]]; then
121121
err_msg "$strategy isn't a valid strategy. Valid strategies are BASIC, DEFAULT, EXPLORE, TIMING and CONGESTION."
122122
exit 1
123123
fi

‎hdk/common/shell_v04261818/build/scripts/strategy_BASIC.tcl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
source $HDK_SHELL_DIR/build/scripts/params.tcl
1717
source $HDK_SHELL_DIR/build/scripts/uram_options.tcl
1818

19-
set synth_options "-keep_equivalent_registers $synth_uram_option"
19+
set synth_options "-keep_equivalent_registers $synth_uram_option -retiming"
2020
set synth_directive "default"
2121

2222
#Set psip to 1 to enable Physical Synthesis in Placer

‎hdk/common/shell_v04261818/build/scripts/strategy_CONGESTION.tcl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
source $HDK_SHELL_DIR/build/scripts/params.tcl
1717
source $HDK_SHELL_DIR/build/scripts/uram_options.tcl
1818

19-
set synth_options "-no_lc -shreg_min_size 10 -control_set_opt_threshold 16 $synth_uram_option"
19+
set synth_options "-no_lc -shreg_min_size 10 -control_set_opt_threshold 16 $synth_uram_option -retiming"
2020
set synth_directive "AlternateRoutability"
2121

2222
#Set psip to 1 to enable Physical Synthesis in Placer

‎hdk/common/shell_v04261818/build/scripts/strategy_DEFAULT.tcl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
source $HDK_SHELL_DIR/build/scripts/params.tcl
1717
source $HDK_SHELL_DIR/build/scripts/uram_options.tcl
1818

19-
set synth_options "-keep_equivalent_registers -flatten_hierarchy rebuilt $synth_uram_option"
19+
set synth_options "-keep_equivalent_registers -flatten_hierarchy rebuilt $synth_uram_option -retiming"
2020
set synth_directive "default"
2121

2222
#Set psip to 1 to enable Physical Synthesis in Placer

‎hdk/common/shell_v04261818/build/scripts/strategy_EXPLORE.tcl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
source $HDK_SHELL_DIR/build/scripts/params.tcl
1717
source $HDK_SHELL_DIR/build/scripts/uram_options.tcl
1818

19-
set synth_options "-keep_equivalent_registers -flatten_hierarchy rebuilt $synth_uram_option"
19+
set synth_options "-keep_equivalent_registers -flatten_hierarchy rebuilt $synth_uram_option -retiming"
2020
set synth_directive "default"
2121

2222
#Set psip to 1 to enable Physical Synthesis in Placer

‎hdk/common/shell_v04261818/build/scripts/strategy_NORETIMING.tcl

Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,58 @@
1+
# Amazon FPGA Hardware Development Kit
2+
#
3+
# Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4+
#
5+
# Licensed under the Amazon Software License (the "License"). You may not use
6+
# this file except in compliance with the License. A copy of the License is
7+
# located at
8+
#
9+
# http://aws.amazon.com/asl/
10+
#
11+
# or in the "license" file accompanying this file. This file is distributed on
12+
# an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
13+
# implied. See the License for the specific language governing permissions and
14+
# limitations under the License.
15+
16+
source $HDK_SHELL_DIR/build/scripts/params.tcl
17+
source $HDK_SHELL_DIR/build/scripts/uram_options.tcl
18+
19+
set synth_options "-no_lc -shreg_min_size 5 -fsm_extraction one_hot -resource_sharing auto $synth_uram_option"
20+
set synth_directive "default"
21+
22+
#Set psip to 1 to enable Physical Synthesis in Placer
23+
set psip 0
24+
25+
set link 1
26+
27+
set opt 1
28+
set opt_options ""
29+
set opt_directive "Explore"
30+
set opt_preHookTcl "$HDK_SHELL_DIR/build/scripts/check_uram.tcl"
31+
set opt_postHookTcl "$HDK_SHELL_DIR/build/scripts/apply_debug_constraints.tcl"
32+
33+
set place 1
34+
set place_options ""
35+
set place_directive "ExtraNetDelay_high"
36+
set place_preHookTcl ""
37+
set place_postHookTcl ""
38+
39+
set phys_opt 1
40+
set phys_options ""
41+
set phys_directive ""
42+
set phys_directive "AggressiveExplore"
43+
set phys_preHookTcl ""
44+
set phys_postHookTcl ""
45+
46+
set route 1
47+
set route_options "-tns_cleanup"
48+
set route_directive "Explore"
49+
set route_preHookTcl ""
50+
set route_postHookTcl ""
51+
52+
set route_phys_opt 1
53+
set post_phys_options ""
54+
set post_phys_directive "AggressiveExplore"
55+
set post_phys_preHookTcl ""
56+
set post_phys_postHookTcl ""
57+
58+

‎hdk/common/shell_v04261818/build/scripts/strategy_TIMING.tcl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
source $HDK_SHELL_DIR/build/scripts/params.tcl
1717
source $HDK_SHELL_DIR/build/scripts/uram_options.tcl
1818

19-
set synth_options "-no_lc -shreg_min_size 5 -fsm_extraction one_hot -resource_sharing auto $synth_uram_option"
19+
set synth_options "-no_lc -shreg_min_size 5 -fsm_extraction one_hot -resource_sharing auto $synth_uram_option -retiming"
2020
set synth_directive "default"
2121

2222
#Set psip to 1 to enable Physical Synthesis in Placer

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