@@ -14,12 +14,8 @@ use crate::cpu_config::x86_64::cpuid::{
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pub enum NormalizeCpuidError {
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/// Failed to set deterministic cache leaf: {0}
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DeterministicCache ( #[ from] DeterministicCacheError ) ,
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- /// Leaf 0x6 is missing from CPUID.
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- MissingLeaf6 ,
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- /// Leaf 0x7 / subleaf 0 is missing from CPUID.
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- MissingLeaf7 ,
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- /// Leaf 0xA is missing from CPUID.
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- MissingLeafA ,
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+ /// Leaf {0} is missing from CPUID.
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+ MissingLeaf ( usize ) ,
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/// Failed to get brand string: {0}
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GetBrandString ( DefaultBrandStringError ) ,
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/// Failed to set brand string: {0}
@@ -164,7 +160,7 @@ impl super::IntelCpuid {
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fn update_power_management_entry ( & mut self ) -> Result < ( ) , NormalizeCpuidError > {
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let leaf_6 = self
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. get_mut ( & CpuidKey :: leaf ( 0x6 ) )
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- . ok_or ( NormalizeCpuidError :: MissingLeaf6 ) ?;
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+ . ok_or ( NormalizeCpuidError :: MissingLeaf ( 6 ) ) ?;
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// CPUID.06H:EAX[1]
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// Intel Turbo Boost Technology available (see description of IA32_MISC_ENABLE[38]).
@@ -184,7 +180,7 @@ impl super::IntelCpuid {
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fn update_extended_feature_flags_entry ( & mut self ) -> Result < ( ) , NormalizeCpuidError > {
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let leaf_7_0 = self
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. get_mut ( & CpuidKey :: subleaf ( 0x7 , 0 ) )
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- . ok_or ( NormalizeCpuidError :: MissingLeaf7 ) ?;
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+ . ok_or ( NormalizeCpuidError :: MissingLeaf ( 7 ) ) ?;
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// Set the following bits as recommended in kernel doc. These bits are reserved in AMD.
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// - CPUID.07H:EBX[6] (FDP_EXCPTN_ONLY)
@@ -243,7 +239,7 @@ impl super::IntelCpuid {
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fn update_performance_monitoring_entry ( & mut self ) -> Result < ( ) , NormalizeCpuidError > {
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let leaf_a = self
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. get_mut ( & CpuidKey :: leaf ( 0xA ) )
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- . ok_or ( NormalizeCpuidError :: MissingLeafA ) ?;
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+ . ok_or ( NormalizeCpuidError :: MissingLeaf ( 0xA ) ) ?;
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leaf_a. result = CpuidRegisters {
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eax : 0 ,
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ebx : 0 ,
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