Synthesis Failure

[zyt1024]

this is my model.

_________________________________________________________________
Layer (type)                 Output Shape              Param #   
=================================================================
input_1 (InputLayer)         [(None, 16, 128, 1)]      0         
_________________________________________________________________
conv_0 (Conv2D)              (None, 16, 128, 256)      256       
_________________________________________________________________
bn_conv_0 (BatchNormalizatio (None, 16, 128, 256)      1024      
_________________________________________________________________
conv_act_0 (Activation)      (None, 16, 128, 256)      0         
_________________________________________________________________
conv_1 (Conv2D)              (None, 16, 128, 256)      65536     
_________________________________________________________________
bn_conv_1 (BatchNormalizatio (None, 16, 128, 256)      1024      
_________________________________________________________________
conv_act_1 (Activation)      (None, 16, 128, 256)      0         
_________________________________________________________________
conv_2 (Conv2D)              (None, 16, 128, 2)        512       
_________________________________________________________________
bn_conv_2 (BatchNormalizatio (None, 16, 128, 2)        8         
_________________________________________________________________
conv_act_2 (Activation)      (None, 16, 128, 2)        0         
_________________________________________________________________
flatten (Flatten)            (None, 4096)              0         
_________________________________________________________________
dense_0 (Dense)              (None, 1)                 4096      
_________________________________________________________________
bn_dense_0 (BatchNormalizati (None, 1)                 4         
_________________________________________________________________
dense_act_0 (Activation)     (None, 1)                 0         
_________________________________________________________________
dense_1 (Dense)              (None, 32)                32        
_________________________________________________________________
bn_dense_1 (BatchNormalizati (None, 32)                128       
_________________________________________________________________
dense_act_1 (Activation)     (None, 32)                0         
_________________________________________________________________
output_dense (Dense)         (None, 2)                 66        
_________________________________________________________________
output_softmax (Activation)  (None, 2)                 0         
=================================================================
Total params: 72,686
Trainable params: 71,592
Non-trainable params: 1,094
_________________________________________________________________

When I perform hls_model.build(csim=False), the process will be killed,The log is as follows.please help me.

INFO: [HLS 200-10] -- Generating RTL for module 'normalize_array_array_ap_fixed_2u_config12_s' 
INFO: [HLS 200-10] ----------------------------------------------------------------
INFO: [RTGEN 206-100] Finished creating RTL model for 'normalize_array_array_ap_fixed_2u_config12_s'.
INFO: [HLS 200-111]  Elapsed time: 1.84 seconds; current allocated memory: 2.619 GB.
INFO: [HLS 200-10] ----------------------------------------------------------------
INFO: [HLS 200-10] -- Generating RTL for module 'relu_array_array_ap_fixed_2u_relu_config13_s' 
INFO: [HLS 200-10] ----------------------------------------------------------------
INFO: [RTGEN 206-100] Finished creating RTL model for 'relu_array_array_ap_fixed_2u_relu_config13_s'.
INFO: [HLS 200-111]  Elapsed time: 2.07 seconds; current allocated memory: 2.620 GB.
INFO: [HLS 200-10] ----------------------------------------------------------------
INFO: [HLS 200-10] -- Generating RTL for module 'dense_wrapper_ap_fixed_ap_fixed_16_6_5_3_0_config15_s' 
INFO: [HLS 200-10] ----------------------------------------------------------------
INFO: [RTGEN 206-104] Estimated max fanout for 'dense_wrapper_ap_fixed_ap_fixed_16_6_5_3_0_config15_s' is 131072, found 2 HDL expressions with this fanout: (ap_phi_mux_do_init_phi_fu_33217_p6 == 1'd1), (ap_phi_mux_do_init_phi_fu_33217_p6 == 1'd0)
INFO: [RTGEN 206-100] Generating core module 'myproject_mul_mul_16s_16s_26_1_1': 63 instance(s).
INFO: [RTGEN 206-100] Generating core module 'myproject_mul_mul_16s_7s_23_1_1': 1 instance(s).
INFO: [RTGEN 206-100] Generating core module 'myproject_mux_646_16_1_1': 1 instance(s).
INFO: [RTGEN 206-100] Finished creating RTL model for 'dense_wrapper_ap_fixed_ap_fixed_16_6_5_3_0_config15_s'.
INFO: [HLS 200-111]  Elapsed time: 12.81 seconds; current allocated memory: 2.712 GB.
/tools/Xilinx/vitis/Vivado/2019.2/bin/rdiArgs.sh: line 280: 1560515 Killed                  "$RDI_PROG" "$@"
Synthesis report not found.

[obsidian-1]

I seem to have the same issue. Did you figure a workaround?