Allowing flexibility with platforms

Author: alex-yang-upenn

hls4ml/backends/vitis_accelerator/supported_boards.json

@@ -2,25 +2,25 @@
     "alveo-u55c": {
       "board_type": "alveo",
       "part": "xcu55c-fsvh2892-2L-e",
-      "platform": "xilinx_u55c_gen3x16_xdma_3_202210_1",
+      "platform": ["xilinx_u55c_gen3x16_xdma_3_202210_1"],
       "memory": {"type": "hbm", "channels": 32, "capacity": 16}
     },
     "alveo-u50": {
       "board_type": "alveo",
       "part": "xcu50-fsvh2104-2-e",
-      "platform": "xilinx_u50_gen3x16_xdma_5_202210_1",
+      "platform": ["xilinx_u50_gen3x16_xdma_5_202210_1"],
       "memory": {"type": "hbm", "channels": 32, "capacity": 8}
     },
     "alveo-u250": {
       "board_type": "alveo",
       "part": "xcu250-figd2104-2L-e",
-      "platform": "xilinx_u250_xdma_201830_2",
+      "platform": ["xilinx_u250_xdma_201830_2"],
       "memory": {"type": "ddr", "channels": 4, "capacity": 64}
     },
     "vck5000": {
       "board_type": "versal",
       "part": "xcvc1902-vsvd1760-2MP-e-S",
-      "platform": "xilinx_vck5000_gen4x8_qdma_2_202220_1",
+      "platform": ["xilinx_vck5000_gen4x8_qdma_2_202220_1"],
       "memory":{"type": "ddr", "channels": 3, "capacity": 12}
     }
   }

hls4ml/backends/vitis_accelerator/vitis_accelerator_backend.py

@@ -17,6 +17,7 @@ def __init__(self):
     def create_initial_config(
         self,
         board="alveo-u55c",
+        platform=None,
         part=None,
         clock_period=5,
         clock_uncertainty='27%',
@@ -46,6 +47,7 @@ def create_initial_config(
         config = super().create_initial_config(part, clock_period, clock_uncertainty, io_type)
         config["AcceleratorConfig"] = {}
         config["AcceleratorConfig"]["Board"] = board
+        config["AcceleratorConfig"]["Platform"] = platform
         config["AcceleratorConfig"]["Num_Kernel"] = num_kernel
         config["AcceleratorConfig"]["Num_Worker"] = num_worker
         config["AcceleratorConfig"]["Batchsize"] = batchsize

hls4ml/backends/vitis_accelerator/vitis_accelerator_config.py

@@ -15,7 +15,18 @@ def __init__(self, config):
             board_info = self.supported_boards[self.board]
             self.board_type = board_info["board_type"]
             self.part = board_info["part"]
-            self.platform = board_info["platform"]
+            if accel_config.get("Platform") is not None:
+                if accel_config.get("Platform") in board_info["platform"]:
+                    self.platform = accel_config.get("Platform")
+                else:
+                    print(
+                        "WARNING: You set an unrecognized Platform."
+                        "Using " + board_info["platform"][0] + " platform instead"
+                    )
+                    self.platform = board_info["platform"][0]
+            else:
+                print("Using " + board_info["platform"][0] + " platform")
+                self.platform = board_info["platform"][0]
             self.memory_type = board_info["memory"]["type"]
             self.memory_channel_count = board_info["memory"]["channels"]
         else:

hls4ml/writer/vitis_accelerator_writer.py

@@ -275,7 +275,7 @@ def write_accelerator_card_cfg(self, model):
                     elif memory_type == "ddr":
                         for i in range(0, num_kernels):
                             newline += f"sp=kernel_wrapper_{i + 1}.in:DDR[{i}]\n"
-                            newline += f"sp=kernel_wrapper_{i + 1}.out:HBM[{i}]\n"
+                            newline += f"sp=kernel_wrapper_{i + 1}.out:DDR[{i}]\n"
                             newline += "\n"
                         for i in range(0, num_kernels):
                             newline += f"slr=kernel_wrapper_{i + 1}:SLR{i}\n"